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Searched refs:AR_ISR_S0 (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/netif/ath/ath_hal/ar5416/
HDar5416_interrupts.c106 ah->ah_intrstate[1] = OS_REG_READ(ah, AR_ISR_S0); in ar5416GetPendingInterrupts()
180 isr0 = OS_REG_READ(ah, AR_ISR_S0); in ar5416GetPendingInterrupts()
181 OS_REG_WRITE(ah, AR_ISR_S0, isr0); in ar5416GetPendingInterrupts()
/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/
HDar9300_interrupts.c149 ah->ah_intrstate[1] = OS_REG_READ(ah, AR_ISR_S0); in ar9300_get_pending_interrupts()
256 s0 = OS_REG_READ(ah, AR_ISR_S0); in ar9300_get_pending_interrupts()
257 OS_REG_WRITE(ah, AR_ISR_S0, s0); in ar9300_get_pending_interrupts()
HDar9300reg.h273 #define AR_ISR_S0 AR_MAC_DMA_OFFSET(MAC_DMA_ISR_S0) macro
/dragonfly/tools/tools/ath/common/
HDdumpregs_5211.c62 DEFINT(AR_ISR_S0, "ISR_S0"),
HDdumpregs_5212.c69 DEFINT(AR_ISR_S0, "ISR_S0"),
HDdumpregs_5416.c72 DEFINT(AR_ISR_S0, "ISR_S0"),
/dragonfly/sys/dev/netif/ath/ath_hal/ar5211/
HDar5211reg.h50 #define AR_ISR_S0 0x0084 /* Secondary interrupt status reg 0 */ macro
/dragonfly/sys/dev/netif/ath/ath_hal/ar5212/
HDar5212reg.h47 #define AR_ISR_S0 0x0084 /* MAC Secondary interrupt status register 0 */ macro
/dragonfly/tools/tools/ath/athregs/
HDdumpregs.c524 , OS_REG_READ(ah, AR_ISR_S0) in ath_hal_dumpint()