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Searched refs:AR_PHY_MC_GAIN_CTRL (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/
HDar9300_eeprom.c1739 regval = OS_REG_READ(ah, AR_PHY_MC_GAIN_CTRL); in ar9300_ant_ctrl_apply()
1751 OS_REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); in ar9300_ant_ctrl_apply()
1770 regval = OS_REG_READ(ah, AR_PHY_MC_GAIN_CTRL); in ar9300_ant_ctrl_apply()
1780 OS_REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); in ar9300_ant_ctrl_apply()
1788 u_int32_t reg_val = OS_REG_READ(ah, AR_PHY_MC_GAIN_CTRL); in ar9300_ant_ctrl_apply()
1803 OS_REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, reg_val); in ar9300_ant_ctrl_apply()
1815 OS_REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, reg_val); in ar9300_ant_ctrl_apply()
HDar9300_attach.c3974 u_int32_t reg_val = OS_REG_READ(ah, AR_PHY_MC_GAIN_CTRL); in ar9300_ant_div_comb_get_config()
4007 reg_val = OS_REG_READ(ah, AR_PHY_MC_GAIN_CTRL); in ar9300_ant_div_comb_set_config()
4028 OS_REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, reg_val); in ar9300_ant_div_comb_set_config()
HDar9300_reset.c6417 regval = OS_REG_READ(ah, AR_PHY_MC_GAIN_CTRL); in ar9300_ant_ctrl_set_lna_div_use_bt_ant()
6427 OS_REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); in ar9300_ant_ctrl_set_lna_div_use_bt_ant()
6442 regval = OS_REG_READ(ah, AR_PHY_MC_GAIN_CTRL); in ar9300_ant_ctrl_set_lna_div_use_bt_ant()
6452 OS_REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); in ar9300_ant_ctrl_set_lna_div_use_bt_ant()
HDar9300phy.h348 #define AR_PHY_MC_GAIN_CTRL AR_AGC_OFFSET(BB_multichain_gain_ctrl) macro