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Searched refs:CHV_PLL_DW3 (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/i915/
HDintel_display.c6719 dpio_val = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW3(port)); in chv_prepare_pll()
6724 vlv_dpio_write(dev_priv, pipe, CHV_PLL_DW3(port), dpio_val); in chv_prepare_pll()
7473 pll_dw3 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW3(port)); in chv_crtc_clock_get()
HDi915_reg.h1654 #define CHV_PLL_DW3(ch) _PIPE(ch, _CHV_PLL_DW3_CH0, _CHV_PLL_DW3_CH1) macro