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Searched refs:DCIO_GPU_TIMER_START_3_END_30 (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_10_0_enum.h350 DCIO_GPU_TIMER_START_3_END_30 = 0x3, enumerator
HDdce_11_0_enum.h1119 DCIO_GPU_TIMER_START_3_END_30 = 0x3, enumerator
HDdce_11_2_enum.h1518 DCIO_GPU_TIMER_START_3_END_30 = 0x3, enumerator
/dragonfly/sys/dev/drm/amd/include/
HDvega10_enum.h12091 DCIO_GPU_TIMER_START_3_END_30 = 0x00000003, enumerator