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Searched refs:FDI_RX_CTL (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/i915/
HDintel_ddi.c958 I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
959 POSTING_READ(FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
964 I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
998 I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
999 POSTING_READ(FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
1029 I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
1030 POSTING_READ(FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
2364 val = I915_READ(FDI_RX_CTL(PIPE_A)); in intel_ddi_fdi_post_disable()
2366 I915_WRITE(FDI_RX_CTL(PIPE_A), val); in intel_ddi_fdi_post_disable()
2376 val = I915_READ(FDI_RX_CTL(PIPE_A)); in intel_ddi_fdi_post_disable()
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HDintel_display.c1135 val = I915_READ(FDI_RX_CTL(pipe)); in assert_fdi_rx()
1167 val = I915_READ(FDI_RX_CTL(pipe)); in assert_fdi_rx_pll()
3740 reg = FDI_RX_CTL(pipe); in intel_fdi_normal_train()
3793 reg = FDI_RX_CTL(pipe); in ironlake_fdi_link_train()
3828 reg = FDI_RX_CTL(pipe); in ironlake_fdi_link_train()
3898 reg = FDI_RX_CTL(pipe); in gen6_fdi_link_train()
3951 reg = FDI_RX_CTL(pipe); in gen6_fdi_link_train()
4028 reg = FDI_RX_CTL(pipe); in ivb_manual_fdi_link_train()
4049 reg = FDI_RX_CTL(pipe); in ivb_manual_fdi_link_train()
4084 reg = FDI_RX_CTL(pipe); in ivb_manual_fdi_link_train()
[all …]
HDintel_crt.c1021 dev_priv->fdi_rx_config = I915_READ(FDI_RX_CTL(PIPE_A)) & fdi_config; in intel_crt_init()
HDi915_reg.h7573 #define FDI_RX_CTL(pipe) _MMIO_PIPE(pipe, _FDI_RXA_CTL, _FDI_RXB_CTL) macro