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Searched refs:PIPE_CONTROL_CONST_CACHE_INVALIDATE (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/i915/
HDintel_ringbuffer.c239 flags |= PIPE_CONTROL_CONST_CACHE_INVALIDATE; in gen6_render_ring_flush()
310 flags |= PIPE_CONTROL_CONST_CACHE_INVALIDATE; in gen7_render_ring_flush()
363 flags |= PIPE_CONTROL_CONST_CACHE_INVALIDATE; in gen8_render_ring_flush()
HDintel_lrc.c1748 flags |= PIPE_CONTROL_CONST_CACHE_INVALIDATE; in gen8_emit_flush_render()
HDi915_reg.h644 #define PIPE_CONTROL_CONST_CACHE_INVALIDATE (1<<3) macro