Searched refs:PUNIT_REG_DSPFREQ (Results 1 – 4 of 4) sorted by relevance
| /dragonfly/sys/dev/drm/i915/ |
| HD | intel_cdclk.c | 507 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ); in vlv_set_cdclk() 510 vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, val); in vlv_set_cdclk() 511 if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ) & in vlv_set_cdclk() 594 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ); in chv_set_cdclk() 597 vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, val); in chv_set_cdclk() 598 if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ) & in chv_set_cdclk()
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| HD | intel_runtime_pm.c | 1379 state = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ) & DP_SSS_MASK(pipe); in chv_pipe_power_well_enabled() 1391 ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ) & DP_SSC_MASK(pipe); in chv_pipe_power_well_enabled() 1412 ((vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ) & DP_SSS_MASK(pipe)) == state) in chv_set_pipe_power_well() 1417 ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ); in chv_set_pipe_power_well() 1420 vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, ctrl); in chv_set_pipe_power_well() 1425 vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ)); in chv_set_pipe_power_well()
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| HD | intel_pm.c | 342 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ); in chv_set_memory_pm5() 347 vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, val); in chv_set_memory_pm5() 5617 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ); in vlv_wm_get_hw_state()
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| HD | i915_reg.h | 1196 #define PUNIT_REG_DSPFREQ 0x36 macro
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