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Searched refs:UPLL_FB_DIV_MASK (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
HDrv770.c75 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(0x50000), ~UPLL_FB_DIV_MASK); in rv770_set_uvd_clocks()
101 ~UPLL_FB_DIV_MASK); in rv770_set_uvd_clocks()
HDrv770d.h63 # define UPLL_FB_DIV_MASK 0x01FFFFFF macro
HDsid.h147 # define UPLL_FB_DIV_MASK 0x01FFFFFF macro
HDevergreend.h368 # define UPLL_FB_DIV_MASK 0x01FFFFFF macro
HDr600d.h1562 # define UPLL_FB_DIV_MASK 0x0000FFF0 macro
HDr600.c249 ~(UPLL_FB_DIV_MASK | UPLL_REF_DIV_MASK)); in r600_set_uvd_clocks()
HDevergreen.c1223 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in evergreen_set_uvd_clocks()
HDsi.c7041 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in si_set_uvd_clocks()