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Searched refs:current_state (Results 1 – 25 of 37) sorted by relevance

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/dragonfly/sys/dev/drm/amd/display/dc/core/
HDdc.c200 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_adjust_vmin_vmax()
227 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crtc_position()
260 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_configure_crc()
309 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crc()
334 if (link->dc->current_state->res_ctx.pipe_ctx[i].stream == in dc_stream_set_dither_option()
336 pipes = &link->dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_set_dither_option()
378 if (dc->current_state->res_ctx.pipe_ctx[j].stream in dc_stream_set_static_screen_events()
381 &dc->current_state->res_ctx.pipe_ctx[j]; in dc_stream_set_static_screen_events()
426 link->dc->current_state->res_ctx.pipe_ctx[0].stream; in dc_link_set_preferred_link_settings()
465 if (dc->current_state) { in destruct()
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HDdc_stream.c165 for (i = 0; i < dc->current_state->stream_count; i++) { in dc_stream_get_status()
166 if (stream == dc->current_state->streams[i]) in dc_stream_get_status()
167 return &dc->current_state->stream_status[i]; in dc_stream_get_status()
200 res_ctx = &core_dc->current_state->res_ctx; in dc_stream_set_cursor_attributes()
247 res_ctx = &core_dc->current_state->res_ctx; in dc_stream_set_cursor_position()
279 &core_dc->current_state->res_ctx; in dc_stream_get_vblank_counter()
303 &core_dc->current_state->res_ctx; in dc_stream_get_scanoutpos()
HDdc_surface.c115 if (core_dc->current_state == NULL) in dc_plane_get_status()
120 &core_dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
HDdc_link_hwss.c63 link->dc->current_state->res_ctx.pipe_ctx; in dp_enable_link_phy()
275 &link->dc->current_state->res_ctx.pipe_ctx[0]; in dp_retrain_link_dp_test()
/dragonfly/usr.bin/talk/
HDmsgs.c43 const char *current_state; variable
50 message(current_state); in disp_msg()
58 message(current_state); in start_msgs()
HDinvite.c101 current_state = "Waiting for your party to respond"; in invite_remote()
150 current_state = "Trying to connect to your party's talk daemon"; in announce_invite()
159 current_state = "Trying to connect to local talk daemon"; in announce_invite()
HDlook_up.c66 current_state = "Waiting to connect with caller"; in check_local()
106 current_state = "Checking for invitation on caller's machine"; in look_for_invite()
HDtalk.h45 extern const char *current_state;
HDinit_disp.c108 current_state = "No connection yet"; in init_display()
/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
HDdcn10_hw_sequencer.c344 dc->current_state->bw.dcn.clk.dcfclk_khz, in dcn10_log_hw_state()
345 dc->current_state->bw.dcn.clk.dcfclk_deep_sleep_khz, in dcn10_log_hw_state()
346 dc->current_state->bw.dcn.clk.dispclk_khz, in dcn10_log_hw_state()
347 dc->current_state->bw.dcn.clk.dppclk_khz, in dcn10_log_hw_state()
348 dc->current_state->bw.dcn.clk.max_supported_dppclk_khz, in dcn10_log_hw_state()
349 dc->current_state->bw.dcn.clk.fclk_khz, in dcn10_log_hw_state()
350 dc->current_state->bw.dcn.clk.socclk_khz); in dcn10_log_hw_state()
613 struct pipe_ctx *old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in false_optc_underflow_wa()
746 if (&dc->current_state->res_ctx.pipe_ctx[i] == pipe_ctx) in reset_back_end_for_pipe()
768 &dc->current_state->res_ctx.pipe_ctx[i]; in dcn10_hw_wa_force_recovery()
[all …]
/dragonfly/sys/dev/drm/radeon/
HDrs780_dpm.c380 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_voltage() local
382 if ((current_state->max_voltage == RS780_VDDC_LEVEL_HIGH) && in rs780_force_voltage()
383 (current_state->min_voltage == RS780_VDDC_LEVEL_HIGH)) in rs780_force_voltage()
407 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_fbdiv() local
409 if (current_state->sclk_low == current_state->sclk_high) in rs780_force_fbdiv()
568 struct igp_ps *current_state = rs780_get_ps(old_ps); in rs780_set_uvd_clock_before_set_eng_clock() local
574 if (new_state->sclk_high >= current_state->sclk_high) in rs780_set_uvd_clock_before_set_eng_clock()
585 struct igp_ps *current_state = rs780_get_ps(old_ps); in rs780_set_uvd_clock_after_set_eng_clock() local
591 if (new_state->sclk_high < current_state->sclk_high) in rs780_set_uvd_clock_after_set_eng_clock()
HDrv770_dpm.c1441 struct rv7xx_ps *current_state = rv770_get_ps(old_ps); in rv770_set_uvd_clock_before_set_eng_clock() local
1447 if (new_state->high.sclk >= current_state->high.sclk) in rv770_set_uvd_clock_before_set_eng_clock()
1458 struct rv7xx_ps *current_state = rv770_get_ps(old_ps); in rv770_set_uvd_clock_after_set_eng_clock() local
1464 if (new_state->high.sclk < current_state->high.sclk) in rv770_set_uvd_clock_after_set_eng_clock()
1754 struct rv7xx_ps *current_state = rv770_get_ps(radeon_current_state); in rv770_program_dcodt_before_state_switch() local
1761 if (current_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_before_state_switch()
1783 struct rv7xx_ps *current_state = rv770_get_ps(radeon_current_state); in rv770_program_dcodt_after_state_switch() local
1790 if (current_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_after_state_switch()
HDrv6xx_dpm.c1517 struct rv6xx_ps *current_state = rv6xx_get_ps(old_ps); in rv6xx_set_uvd_clock_before_set_eng_clock() local
1523 if (new_state->high.sclk >= current_state->high.sclk) in rv6xx_set_uvd_clock_before_set_eng_clock()
1534 struct rv6xx_ps *current_state = rv6xx_get_ps(old_ps); in rv6xx_set_uvd_clock_after_set_eng_clock() local
1540 if (new_state->high.sclk < current_state->high.sclk) in rv6xx_set_uvd_clock_after_set_eng_clock()
HDni_dpm.c3511 struct ni_ps *current_state = ni_get_ps(old_ps); in ni_set_uvd_clock_before_set_eng_clock() local
3518 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_before_set_eng_clock()
3529 struct ni_ps *current_state = ni_get_ps(old_ps); in ni_set_uvd_clock_after_set_eng_clock() local
3536 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_after_set_eng_clock()
/dragonfly/sys/dev/drm/amd/display/dc/dce110/
HDdce110_hw_sequencer.c1000 … if (core_dc->current_state->res_ctx.pipe_ctx[i].stream_res.audio != NULL) in dce110_enable_audio_stream()
1041 … update_audio_usage(&dc->current_state->res_ctx, dc->res_pool, pipe_ctx->stream_res.audio, false); in dce110_disable_audio_stream()
1303 struct pipe_ctx *pipe_ctx_old = &dc->current_state->res_ctx. in dce110_enable_stream_timing()
1359 struct pipe_ctx *pipe_ctx_old = &dc->current_state->res_ctx. in apply_single_controller_ctx_to_hw()
1552 dc->current_state->res_ctx.pipe_ctx[i].pipe_idx = i; in disable_vga_and_power_gate_all_controllers()
1554 &dc->current_state->res_ctx.pipe_ctx[i]); in disable_vga_and_power_gate_all_controllers()
1903 &dc->current_state->res_ctx.pipe_ctx[i]; in dce110_reset_hw_ctx_wrap()
1932 … pipe_ctx_old->plane_res.mi, dc->current_state->stream_count); in dce110_reset_hw_ctx_wrap()
2049 &dc->current_state->res_ctx.pipe_ctx[i]; in dce110_apply_ctx_to_hw()
2074 &dc->current_state->res_ctx.pipe_ctx[i]; in dce110_apply_ctx_to_hw()
[all …]
HDdce110_resource.c835 if (memcmp(&dc->current_state->bw.dce, in dce110_validate_bandwidth()
990 if (!dc->current_state->res_ctx.pipe_ctx[underlay_idx].stream) { in dce110_acquire_underlay()
/dragonfly/contrib/flex/src/
HDFlexLexer.h168 yy_state_type yy_try_NUL_trans( yy_state_type current_state );
/dragonfly/sys/dev/drm/amd/display/dc/irq/dce110/
HDirq_service_dce110.c208 core_dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg; in dce110_vblank_set()
/dragonfly/sbin/init/
HDinit.c200 static state_t current_state = death; variable
594 utmpx_set_runlevel(get_runlevel(current_state), in transition()
596 current_state = s; in transition()
/dragonfly/sys/dev/drm/amd/display/dc/
HDdc.h288 struct dc_state *current_state; member
/dragonfly/sys/dev/drm/amd/display/dc/dce/
HDdce_clock_source.c616 struct dc_state *context = dc_core->current_state; in dce110_get_pll_pixel_rate_in_hz()
631 struct dc_state *context = dc_core->current_state; in dce110_get_dp_pixel_rate_from_combo_phy_pll()
HDdce_clocks.c549 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn1_ramp_up_dispclk_with_dpp()
/dragonfly/sys/dev/raid/aac/
HDaac_debug.c336 aif->data.EN.data.EBE.current_state, in aac_print_aif()
/dragonfly/crypto/openssh/
HDkrl.c477 choose_next_state(int current_state, u_int64_t contig, int final, in choose_next_state() argument
498 switch (current_state) { in choose_next_state()
/dragonfly/contrib/gdb-7/gdb/
HDi386-tdep.c3468 } current_state; in i386_stap_parse_special_token() local
3470 current_state = TRIPLET; in i386_stap_parse_special_token()
3480 while (current_state != DONE) in i386_stap_parse_special_token()
3484 switch (current_state) in i386_stap_parse_special_token()
3750 ++current_state; in i386_stap_parse_special_token()

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