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Searched refs:ih (Results 1 – 25 of 87) sorted by relevance

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/dragonfly/sys/dev/drm/amd/amdgpu/
HDamdgpu_ih.c42 if (adev->irq.ih.ring_obj == NULL) { in amdgpu_ih_ring_alloc()
43 r = amdgpu_bo_create_kernel(adev, adev->irq.ih.ring_size, in amdgpu_ih_ring_alloc()
45 &adev->irq.ih.ring_obj, in amdgpu_ih_ring_alloc()
46 (u64 *)&adev->irq.ih.gpu_addr, in amdgpu_ih_ring_alloc()
47 (void **)&adev->irq.ih.ring); in amdgpu_ih_ring_alloc()
74 adev->irq.ih.ring_size = ring_size; in amdgpu_ih_ring_init()
75 adev->irq.ih.ptr_mask = adev->irq.ih.ring_size - 1; in amdgpu_ih_ring_init()
76 adev->irq.ih.rptr = 0; in amdgpu_ih_ring_init()
77 adev->irq.ih.use_bus_addr = use_bus_addr; in amdgpu_ih_ring_init()
79 if (adev->irq.ih.use_bus_addr) { in amdgpu_ih_ring_init()
[all …]
HDvega10_ih.c52 adev->irq.ih.enabled = true; in vega10_ih_enable_interrupts()
72 adev->irq.ih.enabled = false; in vega10_ih_disable_interrupts()
73 adev->irq.ih.rptr = 0; in vega10_ih_disable_interrupts()
102 if (adev->irq.ih.use_bus_addr) { in vega10_ih_irq_init()
103 WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE, adev->irq.ih.rb_dma_addr >> 8); in vega10_ih_irq_init()
104 … WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE_HI, ((u64)adev->irq.ih.rb_dma_addr >> 40) & 0xff); in vega10_ih_irq_init()
107 WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8); in vega10_ih_irq_init()
108 WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE_HI, (adev->irq.ih.gpu_addr >> 40) & 0xff); in vega10_ih_irq_init()
111 rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); in vega10_ih_irq_init()
127 if (adev->irq.ih.use_bus_addr) in vega10_ih_irq_init()
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HDtonga_ih.c65 adev->irq.ih.enabled = true; in tonga_ih_enable_interrupts()
85 adev->irq.ih.enabled = false; in tonga_ih_disable_interrupts()
86 adev->irq.ih.rptr = 0; in tonga_ih_disable_interrupts()
121 if (adev->irq.ih.use_bus_addr) in tonga_ih_irq_init()
122 WREG32(mmIH_RB_BASE, adev->irq.ih.rb_dma_addr >> 8); in tonga_ih_irq_init()
124 WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8); in tonga_ih_irq_init()
126 rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); in tonga_ih_irq_init()
139 if (adev->irq.ih.use_bus_addr) in tonga_ih_irq_init()
140 wptr_off = adev->irq.ih.rb_dma_addr + (adev->irq.ih.wptr_offs * 4); in tonga_ih_irq_init()
142 wptr_off = adev->wb.gpu_addr + (adev->irq.ih.wptr_offs * 4); in tonga_ih_irq_init()
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HDcz_ih.c67 adev->irq.ih.enabled = true; in cz_ih_enable_interrupts()
89 adev->irq.ih.enabled = false; in cz_ih_disable_interrupts()
90 adev->irq.ih.rptr = 0; in cz_ih_disable_interrupts()
125 WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8); in cz_ih_irq_init()
127 rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); in cz_ih_irq_init()
136 wptr_off = adev->wb.gpu_addr + (adev->irq.ih.wptr_offs * 4); in cz_ih_irq_init()
192 wptr = le32_to_cpu(adev->wb.wb[adev->irq.ih.wptr_offs]); in cz_ih_get_wptr()
201 wptr, adev->irq.ih.rptr, (wptr + 16) & adev->irq.ih.ptr_mask); in cz_ih_get_wptr()
202 adev->irq.ih.rptr = (wptr + 16) & adev->irq.ih.ptr_mask; in cz_ih_get_wptr()
207 return (wptr & adev->irq.ih.ptr_mask); in cz_ih_get_wptr()
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HDiceland_ih.c67 adev->irq.ih.enabled = true; in iceland_ih_enable_interrupts()
89 adev->irq.ih.enabled = false; in iceland_ih_disable_interrupts()
90 adev->irq.ih.rptr = 0; in iceland_ih_disable_interrupts()
125 WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8); in iceland_ih_irq_init()
127 rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); in iceland_ih_irq_init()
136 wptr_off = adev->wb.gpu_addr + (adev->irq.ih.wptr_offs * 4); in iceland_ih_irq_init()
192 wptr = le32_to_cpu(adev->wb.wb[adev->irq.ih.wptr_offs]); in iceland_ih_get_wptr()
201 wptr, adev->irq.ih.rptr, (wptr + 16) & adev->irq.ih.ptr_mask); in iceland_ih_get_wptr()
202 adev->irq.ih.rptr = (wptr + 16) & adev->irq.ih.ptr_mask; in iceland_ih_get_wptr()
207 return (wptr & adev->irq.ih.ptr_mask); in iceland_ih_get_wptr()
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/dragonfly/sys/opencrypto/
HDskipjack.c79 #define g(k0, k1, k2, k3, ih, il, oh, ol) \ argument
81 oh = k##k0 [il] ^ ih; \
87 #define g0(ih, il, oh, ol) g(0, 1, 2, 3, ih, il, oh, ol) argument
88 #define g4(ih, il, oh, ol) g(4, 5, 6, 7, ih, il, oh, ol) argument
89 #define g8(ih, il, oh, ol) g(8, 9, 0, 1, ih, il, oh, ol) argument
90 #define g2(ih, il, oh, ol) g(2, 3, 4, 5, ih, il, oh, ol) argument
91 #define g6(ih, il, oh, ol) g(6, 7, 8, 9, ih, il, oh, ol) argument
94 #define g_inv(k0, k1, k2, k3, ih, il, oh, ol) \ argument
96 ol = k##k3 [ih] ^ il; \
97 oh = k##k2 [ol] ^ ih; \
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/dragonfly/contrib/openbsd_libm/src/
HDk_rem_pio2f.c48 int32_t jz,jx,jv,jp,jk,carry,n,iq[20],i,j,k,m,q0,ih; in __kernel_rem_pio2f() local
84 ih = 0; in __kernel_rem_pio2f()
88 ih = iq[jz-1]>>(7-q0); in __kernel_rem_pio2f()
90 else if(q0==0) ih = iq[jz-1]>>8; in __kernel_rem_pio2f()
91 else if(z>=(float)0.5) ih=2; in __kernel_rem_pio2f()
93 if(ih>0) { /* q > 0.5 */ in __kernel_rem_pio2f()
111 if(ih==2) { in __kernel_rem_pio2f()
165 y[0] = (ih==0)? fw: -fw; in __kernel_rem_pio2f()
171 y[0] = (ih==0)? fw: -fw; in __kernel_rem_pio2f()
174 y[1] = (ih==0)? fw: -fw; in __kernel_rem_pio2f()
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HDk_rem_pio2.c287 int32_t jz,jx,jv,jp,jk,carry,n,iq[20],i,j,k,m,q0,ih; in __kernel_rem_pio2() local
323 ih = 0; in __kernel_rem_pio2()
327 ih = iq[jz-1]>>(23-q0); in __kernel_rem_pio2()
329 else if(q0==0) ih = iq[jz-1]>>23; in __kernel_rem_pio2()
330 else if(z>=0.5) ih=2; in __kernel_rem_pio2()
332 if(ih>0) { /* q > 0.5 */ in __kernel_rem_pio2()
350 if(ih==2) { in __kernel_rem_pio2()
404 y[0] = (ih==0)? fw: -fw; in __kernel_rem_pio2()
411 y[0] = (ih==0)? fw: -fw; in __kernel_rem_pio2()
414 y[1] = (ih==0)? fw: -fw; in __kernel_rem_pio2()
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/dragonfly/sys/dev/drm/amd/display/amdgpu_dm/
HDamdgpu_dm_irq.c65 void (*ih)(void *), in init_handler_common_data()
69 hcd->handler = ih; in init_handler_common_data()
113 void *ih, in remove_irq_handler() argument
142 if (ih == handler) { in remove_irq_handler()
162 ih, int_params->irq_source, int_params->int_context); in remove_irq_handler()
169 void (*ih)(void *)) in validate_irq_registration_params()
171 if (NULL == int_params || NULL == ih) { in validate_irq_registration_params()
214 void (*ih)(void *), in amdgpu_dm_irq_register_interrupt()
222 if (false == validate_irq_registration_params(int_params, ih)) in amdgpu_dm_irq_register_interrupt()
233 init_handler_common_data(&handler_data->hcd, ih, handler_args, in amdgpu_dm_irq_register_interrupt()
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/dragonfly/tools/tools/net80211/w00t/redir/
HDbuddy.c55 struct ip *ih; in handle_data() local
61 ih = (struct ip*) buf; in handle_data()
66 if (ih->ip_p != 0) in handle_data()
69 if (ih->ip_hl != 5) in handle_data()
73 id = ih->ip_id; in handle_data()
HDredir.c260 struct ip *ih; in send_header() local
294 ih = (struct ip*) (ptr+8); in send_header()
295 ih->ip_v = 4; in send_header()
296 ih->ip_hl = 5; in send_header()
298 ih->ip_len = htons(len); in send_header()
299 ih->ip_id = htons(q->id); in send_header()
300 ih->ip_ttl = 69; in send_header()
301 ih->ip_p = 0; in send_header()
302 ih->ip_src.s_addr = p->src.s_addr; in send_header()
303 ih->ip_dst.s_addr = p->dst.s_addr; in send_header()
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/dragonfly/sys/dev/pccard/pccbb/
HDpccbb.c351 struct cbb_intrhand *ih; in cbb_setup_intr() local
355 ih = kmalloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); in cbb_setup_intr()
356 if (ih == NULL) in cbb_setup_intr()
358 *cookiep = ih; in cbb_setup_intr()
359 ih->intr = intr; in cbb_setup_intr()
360 ih->arg = arg; in cbb_setup_intr()
361 ih->sc = sc; in cbb_setup_intr()
362 ih->serializer = serializer; in cbb_setup_intr()
368 cbb_func_intr, ih, &ih->cookie, NULL, desc); in cbb_setup_intr()
370 kfree(ih, M_DEVBUF); in cbb_setup_intr()
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/dragonfly/lib/libc/db/test/
HDdbtest.c555 static HASHINFO ih; in setinfo() local
594 ih.bsize = atoi(eq); in setinfo()
595 return (&ih); in setinfo()
598 ih.ffactor = atoi(eq); in setinfo()
599 return (&ih); in setinfo()
602 ih.nelem = atoi(eq); in setinfo()
603 return (&ih); in setinfo()
606 ih.cachesize = atoi(eq); in setinfo()
607 return (&ih); in setinfo()
610 ih.lorder = atoi(eq); in setinfo()
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/dragonfly/tools/tools/net80211/wesside/wesside/
HDwesside.c787 struct ip* ih; in calculate_inet_clear() local
797 ih = (struct ip*) &inet_clear[8]; in calculate_inet_clear()
798 ih->ip_hl = 5; in calculate_inet_clear()
799 ih->ip_v = 4; in calculate_inet_clear()
800 ih->ip_tos = 0; in calculate_inet_clear()
801 ih->ip_len = htons(20+8+PRGA_LEN); in calculate_inet_clear()
802 ih->ip_id = htons(666); in calculate_inet_clear()
803 ih->ip_off = 0; in calculate_inet_clear()
804 ih->ip_ttl = ttl_val; in calculate_inet_clear()
805 ih->ip_p = IPPROTO_UDP; in calculate_inet_clear()
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/dragonfly/contrib/tcpdump/
HDprint-juniper.c542 const struct juniper_ipsec_header *ih; in juniper_es_if_print() local
553 ih = (const struct juniper_ipsec_header *)p; in juniper_es_if_print()
555 ND_TCHECK_SIZE(ih); in juniper_es_if_print()
556 switch (GET_U_1(ih->type)) { in juniper_es_if_print()
570 GET_U_1(ih->type), in juniper_es_if_print()
582 GET_BE_U_2(ih->sa_index), in juniper_es_if_print()
583 GET_U_1(ih->ttl), in juniper_es_if_print()
584 tok2str(juniper_ipsec_type_values,"Unknown",GET_U_1(ih->type)), in juniper_es_if_print()
585 GET_U_1(ih->type), in juniper_es_if_print()
586 GET_BE_U_4(ih->spi), in juniper_es_if_print()
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/dragonfly/sys/dev/sound/pci/
HDhdspe.c105 if (scp->ih != NULL) in hdspe_intr()
106 scp->ih(scp); in hdspe_intr()
149 hdspe_intr, sc, &sc->ih, NULL)) { in hdspe_alloc_resources()
364 if (sc->ih) in hdspe_detach()
365 bus_teardown_intr(dev, sc->irq, sc->ih); in hdspe_detach()
HDhdspe.h130 uint32_t (*ih) (struct sc_pcminfo *scp); member
154 void *ih; member
HDvia82c686.c85 void *ih; member
536 if (!via->irq || snd_setup_intr(dev, via->irq, INTR_MPSAFE, via_intr, via, &via->ih)) { in via_attach()
604 if (via->ih) bus_teardown_intr(dev, via->irq, via->ih); in via_attach()
627 bus_teardown_intr(dev, via->irq, via->ih); in via_detach()
HDfm801.c147 void *ih; member
625 if (!fm801->irq || snd_setup_intr(dev, fm801->irq, 0, fm801_intr, fm801, &fm801->ih)) { in fm801_pci_attach()
659 if (fm801->ih) bus_teardown_intr(dev, fm801->irq, fm801->ih); in fm801_pci_attach()
691 bus_teardown_intr(dev, fm801->irq, fm801->ih); in fm801_pci_detach()
/dragonfly/sys/dev/drm/radeon/
HDr600.c3328 rdev->ih.ring_obj = NULL; in r600_init()
3487 rdev->ih.ring_size = ring_size; in r600_ih_ring_init()
3488 rdev->ih.ptr_mask = rdev->ih.ring_size - 1; in r600_ih_ring_init()
3489 rdev->ih.rptr = 0; in r600_ih_ring_init()
3497 if (rdev->ih.ring_obj == NULL) { in r600_ih_ring_alloc()
3498 r = radeon_bo_create(rdev, rdev->ih.ring_size, in r600_ih_ring_alloc()
3501 NULL, NULL, &rdev->ih.ring_obj); in r600_ih_ring_alloc()
3506 r = radeon_bo_reserve(rdev->ih.ring_obj, false); in r600_ih_ring_alloc()
3509 r = radeon_bo_pin(rdev->ih.ring_obj, in r600_ih_ring_alloc()
3511 (u64 *)&rdev->ih.gpu_addr); in r600_ih_ring_alloc()
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/dragonfly/sys/dev/misc/atkbd/
HDatkbd_isa.c56 void *ih; member
122 atkbd_isa_intr, kbd, &sc->ih, NULL, NULL); in atkbdattach()
/dragonfly/sys/dev/raid/dpt/
HDdpt_pci.c76 void * ih; in dpt_pci_attach() local
164 &ih, NULL); in dpt_pci_attach()
/dragonfly/sys/bus/firewire/
HDfwohci_pci.c293 (driver_intr_t *) fwohci_intr, sc, &sc->ih, NULL); in fwohci_pci_attach()
362 int err = bus_teardown_intr(self, sc->irq_res, sc->ih); in fwohci_pci_detach()
367 sc->ih = NULL; in fwohci_pci_detach()
/dragonfly/sys/dev/misc/cmx/
HDcmx.c193 &sc->ih, NULL)) != 0) { in cmx_alloc_resources()
216 if (sc->ih) { in cmx_release_resources()
217 bus_teardown_intr(dev, sc->irq, sc->ih); in cmx_release_resources()
218 sc->ih = NULL; in cmx_release_resources()
/dragonfly/sys/dev/disk/advansys/
HDadv_pci.c136 void *ih; in adv_pci_attach() local
290 bus_setup_intr(dev, irqres, 0, adv_intr, adv, &ih, NULL)) { in adv_pci_attach()

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