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Searched refs:mmBL1_PWM_USER_LEVEL (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_d.h474 #define mmBL1_PWM_USER_LEVEL 0x1629 macro
HDdce_8_0_d.h52 #define mmBL1_PWM_USER_LEVEL 0x1629 macro
HDdce_10_0_d.h52 #define mmBL1_PWM_USER_LEVEL 0x1629 macro
HDdce_11_0_d.h48 #define mmBL1_PWM_USER_LEVEL 0x1629 macro
HDdce_11_2_d.h55 #define mmBL1_PWM_USER_LEVEL 0x1629 macro
HDdce_12_0_offset.h1304 #define mmBL1_PWM_USER_LEVEL … macro