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Searched refs:mmCRTC0_CRTC_TEST_PATTERN_CONTROL (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce120/
HDdce120_timing_generator.c1092 … dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_CONTROL, tg110->offsets.crtc, 0); in dce120_timing_generator_set_test_pattern()
1104 … dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_CONTROL, tg110->offsets.crtc, value); in dce120_timing_generator_set_test_pattern()
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_d.h545 #define mmCRTC0_CRTC_TEST_PATTERN_CONTROL 0x1BBA macro
HDdce_8_0_d.h530 #define mmCRTC0_CRTC_TEST_PATTERN_CONTROL 0x1bba macro
HDdce_10_0_d.h613 #define mmCRTC0_CRTC_TEST_PATTERN_CONTROL 0x1bba macro
HDdce_11_0_d.h512 #define mmCRTC0_CRTC_TEST_PATTERN_CONTROL 0x1bba macro
HDdce_11_2_d.h519 #define mmCRTC0_CRTC_TEST_PATTERN_CONTROL 0x1bba macro
HDdce_12_0_offset.h4168 #define mmCRTC0_CRTC_TEST_PATTERN_CONTROL … macro