Home
last modified time | relevance | path

Searched refs:mmCRTC1_CRTC_GSL_CONTROL (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce80/
HDdce80_hw_sequencer.c49 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/display/dc/dce112/
HDdce112_hw_sequencer.c47 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/display/dc/dce100/
HDdce100_hw_sequencer.c48 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/display/dc/dce120/
HDdce120_hw_sequencer.c59 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_d.h586 #define mmCRTC1_CRTC_GSL_CONTROL 0x1E7B macro
HDdce_8_0_d.h853 #define mmCRTC1_CRTC_GSL_CONTROL 0x1e7b macro
HDdce_10_0_d.h982 #define mmCRTC1_CRTC_GSL_CONTROL 0x1d7b macro
HDdce_11_0_d.h793 #define mmCRTC1_CRTC_GSL_CONTROL 0x1d7b macro
HDdce_11_2_d.h842 #define mmCRTC1_CRTC_GSL_CONTROL 0x1d7b macro
HDdce_12_0_offset.h5038 #define mmCRTC1_CRTC_GSL_CONTROL … macro
/dragonfly/sys/dev/drm/amd/display/dc/dce110/
HDdce110_hw_sequencer.c90 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),