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Searched refs:mmCRTC3_CRTC_GSL_CONTROL (Results 1 – 10 of 10) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce80/
HDdce80_hw_sequencer.c55 .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/display/dc/dce112/
HDdce112_hw_sequencer.c53 .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/display/dc/dce100/
HDdce100_hw_sequencer.c54 .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/display/dc/dce120/
HDdce120_hw_sequencer.c65 .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_d.h740 #define mmCRTC3_CRTC_GSL_CONTROL 0x447B macro
HDdce_8_0_d.h855 #define mmCRTC3_CRTC_GSL_CONTROL 0x447b macro
HDdce_10_0_d.h984 #define mmCRTC3_CRTC_GSL_CONTROL 0x417b macro
HDdce_11_0_d.h795 #define mmCRTC3_CRTC_GSL_CONTROL 0x417b macro
HDdce_11_2_d.h844 #define mmCRTC3_CRTC_GSL_CONTROL 0x417b macro
HDdce_12_0_offset.h6594 #define mmCRTC3_CRTC_GSL_CONTROL … macro