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Searched refs:mmDCCG_SOFT_RESET (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_d.h1193 #define mmDCCG_SOFT_RESET 0x015F macro
HDdce_8_0_d.h1063 #define mmDCCG_SOFT_RESET 0x15f macro
HDdce_10_0_d.h1214 #define mmDCCG_SOFT_RESET 0x15f macro
HDdce_11_0_d.h1027 #define mmDCCG_SOFT_RESET 0x15f macro
HDdce_11_2_d.h1106 #define mmDCCG_SOFT_RESET 0x15f macro
HDdce_12_0_offset.h820 #define mmDCCG_SOFT_RESET … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_offset.h634 #define mmDCCG_SOFT_RESET … macro