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Searched refs:mmDCP0_DC_LUT_VGA_ACCESS_ENABLE (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_d.h1505 #define mmDCP0_DC_LUT_VGA_ACCESS_ENABLE 0x1A7D macro
HDdce_8_0_d.h2411 #define mmDCP0_DC_LUT_VGA_ACCESS_ENABLE 0x1a7d macro
HDdce_10_0_d.h3190 #define mmDCP0_DC_LUT_VGA_ACCESS_ENABLE 0x1a7d macro
HDdce_11_0_d.h2937 #define mmDCP0_DC_LUT_VGA_ACCESS_ENABLE 0x1a7d macro
HDdce_11_2_d.h4175 #define mmDCP0_DC_LUT_VGA_ACCESS_ENABLE 0x1a7d macro
HDdce_12_0_offset.h3720 #define mmDCP0_DC_LUT_VGA_ACCESS_ENABLE … macro