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Searched refs:mmDC_I2C_INTERRUPT_CONTROL (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_d.h1336 #define mmDC_I2C_INTERRUPT_CONTROL 0x181B macro
HDdce_8_0_d.h3544 #define mmDC_I2C_INTERRUPT_CONTROL 0x181b macro
HDdce_10_0_d.h7158 #define mmDC_I2C_INTERRUPT_CONTROL 0x16d6 macro
HDdce_11_0_d.h7347 #define mmDC_I2C_INTERRUPT_CONTROL 0x16d6 macro
HDdce_11_2_d.h8740 #define mmDC_I2C_INTERRUPT_CONTROL 0x16d6 macro
HDdce_12_0_offset.h1640 #define mmDC_I2C_INTERRUPT_CONTROL … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_offset.h7663 #define mmDC_I2C_INTERRUPT_CONTROL … macro