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Searched refs:mmDC_LUT_CONTROL (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_d.h1457 #define mmDC_LUT_CONTROL 0x1A80 macro
HDdce_8_0_d.h2431 #define mmDC_LUT_CONTROL 0x1a80 macro
HDdce_10_0_d.h3210 #define mmDC_LUT_CONTROL 0x1a80 macro
HDdce_11_0_d.h2957 #define mmDC_LUT_CONTROL 0x1a80 macro
HDdce_11_2_d.h4195 #define mmDC_LUT_CONTROL 0x1a80 macro
/dragonfly/sys/dev/drm/amd/amdgpu/
HDdce_v10_0.c2102 WREG32(mmDC_LUT_CONTROL + amdgpu_crtc->crtc_offset, 0); in dce_v10_0_crtc_load_lut()
HDdce_v11_0.c2138 WREG32(mmDC_LUT_CONTROL + amdgpu_crtc->crtc_offset, 0); in dce_v11_0_crtc_load_lut()