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Searched refs:mmDP2_DP_DPHY_CNTL (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_d.h3221 #define mmDP2_DP_DPHY_CNTL 0x42D0 macro
HDdce_8_0_d.h3870 #define mmDP2_DP_DPHY_CNTL 0x42d0 macro
HDdce_10_0_d.h4502 #define mmDP2_DP_DPHY_CNTL 0x4caf macro
HDdce_11_0_d.h4480 #define mmDP2_DP_DPHY_CNTL 0x4caf macro
HDdce_11_2_d.h5712 #define mmDP2_DP_DPHY_CNTL 0x4caf macro
HDdce_12_0_offset.h10794 #define mmDP2_DP_DPHY_CNTL … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_offset.h8989 #define mmDP2_DP_DPHY_CNTL … macro