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Searched refs:mmDP3_DP_SEC_CNTL (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_d.h3306 #define mmDP3_DP_SEC_CNTL 0x45A0 macro
HDdce_8_0_d.h4007 #define mmDP3_DP_SEC_CNTL 0x45a0 macro
HDdce_10_0_d.h4639 #define mmDP3_DP_SEC_CNTL 0x4dc3 macro
HDdce_11_0_d.h4670 #define mmDP3_DP_SEC_CNTL 0x4dc3 macro
HDdce_11_2_d.h5902 #define mmDP3_DP_SEC_CNTL 0x4dc3 macro
HDdce_12_0_offset.h11112 #define mmDP3_DP_SEC_CNTL … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_offset.h9329 #define mmDP3_DP_SEC_CNTL … macro