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Searched refs:mmDP4_DP_SEC_CNTL (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_6_0_d.h3358 #define mmDP4_DP_SEC_CNTL 0x48A0 macro
HDdce_8_0_d.h4008 #define mmDP4_DP_SEC_CNTL 0x48a0 macro
HDdce_10_0_d.h4640 #define mmDP4_DP_SEC_CNTL 0x4ec3 macro
HDdce_11_0_d.h4671 #define mmDP4_DP_SEC_CNTL 0x4ec3 macro
HDdce_11_2_d.h5903 #define mmDP4_DP_SEC_CNTL 0x4ec3 macro
HDdce_12_0_offset.h11396 #define mmDP4_DP_SEC_CNTL … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_offset.h9639 #define mmDP4_DP_SEC_CNTL … macro