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Searched refs:mmDP6_DP_DPHY_CNTL (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_8_0_d.h3874 #define mmDP6_DP_DPHY_CNTL 0x4ed0 macro
HDdce_10_0_d.h4506 #define mmDP6_DP_DPHY_CNTL 0x54af macro
HDdce_11_0_d.h4484 #define mmDP6_DP_DPHY_CNTL 0x54af macro
HDdce_11_2_d.h5716 #define mmDP6_DP_DPHY_CNTL 0x54af macro
HDdce_12_0_offset.h11930 #define mmDP6_DP_DPHY_CNTL … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
HDdcn_1_0_offset.h10229 #define mmDP6_DP_DPHY_CNTL … macro