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Searched refs:mmMC_VM_L2_PERFCOUNTER2_CFG_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
HDmmhub_9_1_offset.h1771 #define mmMC_VM_L2_PERFCOUNTER2_CFG_BASE_IDX … macro
HDmmhub_1_0_offset.h1739 #define mmMC_VM_L2_PERFCOUNTER2_CFG_BASE_IDX … macro
HDmmhub_9_3_0_offset.h1755 #define mmMC_VM_L2_PERFCOUNTER2_CFG_BASE_IDX … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h5884 #define mmMC_VM_L2_PERFCOUNTER2_CFG_BASE_IDX … macro
HDgc_9_2_1_offset.h6127 #define mmMC_VM_L2_PERFCOUNTER2_CFG_BASE_IDX … macro
HDgc_9_1_offset.h6163 #define mmMC_VM_L2_PERFCOUNTER2_CFG_BASE_IDX … macro