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Searched refs:slots (Results 1 – 25 of 85) sorted by relevance

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/dragonfly/contrib/gcc-4.7/gcc/
HDpointer-set.c37 const void **slots; member
80 result->slots = XCNEWVEC (const void *, result->n_slots); in pointer_set_create()
88 XDELETEVEC (pset->slots); in pointer_set_destroy()
102 if (pset->slots[n] == p) in pointer_set_contains()
104 else if (pset->slots[n] == 0) in pointer_set_contains()
118 insert_aux (const void *p, const void **slots, size_t n_slots, size_t log_slots) in insert_aux() argument
123 if (slots[n] == p || slots[n] == 0) in insert_aux()
152 const void *value = pset->slots[i]; in pointer_set_insert()
157 XDELETEVEC (pset->slots); in pointer_set_insert()
160 pset->slots = new_slots; in pointer_set_insert()
[all …]
/dragonfly/sys/dev/drm/
HDlinux_radix.c67 node = node->slots[radix_pos(index, height--)]; in radix_tree_lookup()
69 item = node->slots[radix_pos(index, 0)]; in radix_tree_lookup()
97 *pppslot = node->slots + pos; in radix_tree_iter_find()
99 next = node->slots[pos]; in radix_tree_iter_find()
133 node = node->slots[radix_pos(index, height--)]; in radix_tree_delete()
137 item = node->slots[idx]; in radix_tree_delete()
143 node->slots[idx] = NULL; in radix_tree_delete()
207 node->slots[0] = root->rnode; in radix_tree_insert()
220 if (node->slots[idx] == NULL) in radix_tree_insert()
222 node = node->slots[idx]; in radix_tree_insert()
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HDdrm_dp_mst_topology.c2585 struct drm_dp_vcpi *vcpi, int pbn, int slots) in drm_dp_init_vcpi() argument
2590 if (slots > 63) in drm_dp_init_vcpi()
2594 vcpi->aligned_pbn = slots * mgr->pbn_div; in drm_dp_init_vcpi()
2595 vcpi->num_slots = slots; in drm_dp_init_vcpi()
2656 int slots) in drm_dp_atomic_release_vcpi_slots() argument
2670 topology_state->avail_slots += slots; in drm_dp_atomic_release_vcpi_slots()
2672 slots, topology_state->avail_slots); in drm_dp_atomic_release_vcpi_slots()
2686 struct drm_dp_mst_port *port, int pbn, int slots) in drm_dp_mst_allocate_vcpi() argument
2694 if (slots < 0) in drm_dp_mst_allocate_vcpi()
2705 ret = drm_dp_init_vcpi(mgr, &port->vcpi, pbn, slots); in drm_dp_mst_allocate_vcpi()
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/dragonfly/contrib/pam_passwdqc/
HDpasswdqc_filter.h71 passwdqc_filter_f_t slots[4]; member
194 dst->slots[0] = (f & lomask) | ((ssd & 0x000f) << lobits); in passwdqc_filter_unpack()
196 dst->slots[1] = (f & lomask) | ((ssd & 0x00f0) << (lobits - 4)); in passwdqc_filter_unpack()
199 dst->slots[2] = (f & lomask) | ((ssd & 0x0f00) << (lobits - 8)); in passwdqc_filter_unpack()
201 dst->slots[3] = (f & lomask) | ((ssd & 0xf000) << (lobits - 12)); in passwdqc_filter_unpack()
209 dst->slots[0] = f; in passwdqc_filter_unpack()
216 dst->slots[0] = f & fmask; in passwdqc_filter_unpack()
219 dst->slots[1] = f & fmask; in passwdqc_filter_unpack()
220 if (unlikely(dst->slots[0] < dst->slots[1])) in passwdqc_filter_unpack()
223 dst->slots[2] = f & fmask; in passwdqc_filter_unpack()
[all …]
/dragonfly/contrib/gcc-4.7/gcc/objc/
HDobjc-map.h74 tree * GTY ((length ("%h.number_of_slots"))) slots;
144 if (map->slots[i] == OBJC_MAP_PRIVATE_EMPTY_SLOT) in objc_map_get()
147 if (map->slots[i] == key) in objc_map_get()
154 if (map->slots[i] == OBJC_MAP_PRIVATE_EMPTY_SLOT) in objc_map_get()
157 if (map->slots[i] == key) in objc_map_get()
186 if (map->slots[i] == OBJC_MAP_PRIVATE_EMPTY_SLOT) in objc_map_put()
189 map->slots[i] = key; in objc_map_put()
193 if (map->slots[i] == key) in objc_map_put()
276 slot = map->slots[*i]; in objc_map_iterator_move_to_next()
293 return map->slots[i - 1]; in objc_map_iterator_current_key()
HDobjc-map.c70 map->slots = (tree *)ggc_internal_cleared_vec_alloc_stat (initial_capacity, sizeof (tree)); in objc_map_alloc_ggc()
73 if (map->slots == NULL) in objc_map_alloc_ggc()
101 tree *old_slots = map->slots; in objc_map_private_resize()
115 map->slots = (tree *)ggc_internal_cleared_vec_alloc_stat (map->number_of_slots, sizeof (tree)); in objc_map_private_resize()
118 if (map->slots == NULL) in objc_map_private_resize()
129 if (map->slots[k] == OBJC_MAP_PRIVATE_EMPTY_SLOT) in objc_map_private_resize()
131 map->slots[k] = old_slots[i]; in objc_map_private_resize()
140 if (map->slots[k] == OBJC_MAP_PRIVATE_EMPTY_SLOT) in objc_map_private_resize()
142 map->slots[k] = old_slots[i]; in objc_map_private_resize()
/dragonfly/contrib/gcc-8.0/gcc/
HDlra-spills.c124 static struct slot *slots; variable
145 x = slots[slot_num].mem; in assign_mem_slot()
148 x = assign_stack_local (BLKmode, slots[slot_num].size, in assign_mem_slot()
149 slots[slot_num].align); in assign_mem_slot()
150 slots[slot_num].mem = x; in assign_mem_slot()
205 diff = (int (slots[slot_num1].size.is_constant ()) in pseudo_reg_slot_compare()
206 - int (slots[slot_num2].size.is_constant ())); in pseudo_reg_slot_compare()
330 slots[slot_num].align = MAX (slots[slot_num].align, align); in add_pseudo_to_slot()
331 slots[slot_num].size = upper_bound (slots[slot_num].size, in add_pseudo_to_slot()
334 if (slots[slot_num].regno < 0) in add_pseudo_to_slot()
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HDipa-chkp.c328 bitmap slots = BITMAP_ALLOC (NULL); in chkp_copy_function_type_adding_bounds() local
332 chkp_find_bound_slots (TREE_VALUE (arg_type), slots); in chkp_copy_function_type_adding_bounds()
334 EXECUTE_IF_SET_IN_BITMAP (slots, 0, bnd_no, bi) in chkp_copy_function_type_adding_bounds()
344 BITMAP_FREE (slots); in chkp_copy_function_type_adding_bounds()
405 bitmap slots = BITMAP_ALLOC (NULL); in chkp_add_bounds_params_to_function() local
409 chkp_find_bound_slots (TREE_TYPE (arg), slots); in chkp_add_bounds_params_to_function()
411 EXECUTE_IF_SET_IN_BITMAP (slots, 0, bnd_no, bi) in chkp_add_bounds_params_to_function()
438 BITMAP_FREE (slots); in chkp_add_bounds_params_to_function()
/dragonfly/contrib/lvm2/dist/libdm/datastruct/
HDhash.c30 struct dm_hash_node **slots; member
109 len = sizeof(*(hc->slots)) * new_size; in dm_hash_create()
110 if (!(hc->slots = dm_malloc(len))) { in dm_hash_create()
114 memset(hc->slots, 0, len); in dm_hash_create()
118 dm_free(hc->slots); in dm_hash_create()
129 for (c = t->slots[i]; c; c = n) { in _free_nodes()
138 dm_free(t->slots); in dm_hash_destroy()
148 for (c = &t->slots[h]; *c; c = &((*c)->next)) { in _find()
228 for (c = t->slots[i]; c; c = n) { in dm_hash_iter()
237 memset(t->slots, 0, sizeof(struct dm_hash_node *) * t->num_slots); in dm_hash_wipe()
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/dragonfly/sys/dev/misc/evdev/
HDevdev_mt.c95 union evdev_mt_slot slots[]; member
104 ffc_slot(struct evdev_dev *evdev, slotset_t slots) in ffc_slot() argument
106 return (ffs(~slots & ((2U << MAXIMAL_MT_SLOT(evdev)) - 1)) - 1); in ffc_slot()
113 size_t size = offsetof(struct evdev_mt, slots); in evdev_mt_init()
114 int slot, slots; in evdev_mt_init() local
126 slots = MAXIMAL_MT_SLOT(evdev) + 1; in evdev_mt_init()
127 size += sizeof(mt->slots[0]) * slots; in evdev_mt_init()
129 size += sizeof(mt->match_slots[0]) * slots; in evdev_mt_init()
130 size += sizeof(mt->matrix[0]) * (slots + 6) * slots; in evdev_mt_init()
138 mt->match_slots = mt->slots + slots; in evdev_mt_init()
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/dragonfly/sys/dev/disk/sdhci/
HDsdhci_pci.c145 struct sdhci_slot slots[6]; member
316 int bar, err, rid, slots, i; in sdhci_pci_attach() local
341 slots = pci_read_config(dev, PCI_SLOT_INFO, 1); in sdhci_pci_attach()
342 bar = PCI_SLOT_INFO_FIRST_BAR(slots); in sdhci_pci_attach()
343 slots = PCI_SLOT_INFO_SLOTS(slots); in sdhci_pci_attach()
344 if (slots > 6 || bar > 5) { in sdhci_pci_attach()
346 slots, bar); in sdhci_pci_attach()
376 for (i = 0; i < slots; i++) { in sdhci_pci_attach()
377 struct sdhci_slot *slot = &sc->slots[sc->num_slots]; in sdhci_pci_attach()
406 struct sdhci_slot *slot = &sc->slots[i]; in sdhci_pci_attach()
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/dragonfly/usr.bin/dsynth/
HDmonitor.c58 } slots[MAXWORKERS]; member
151 SNPRINTF(rs->slots[i].portdir, "%s", work->pkg->portdir); in MonitorUpdate()
153 SNPRINTF(rs->slots[i].portdir, "%s", ""); in MonitorUpdate()
154 rs->slots[i].work = copy; in MonitorUpdate()
267 copy.slots[i].work = rs->slots[i].work; in MonitorDirective()
268 NCursesRunStats.update(&copy.slots[i].work, in MonitorDirective()
269 rs->slots[i].portdir); in MonitorDirective()
/dragonfly/sys/dev/drm/amd/display/dc/dce/
HDdce_link_encoder.c1187 uint32_t *slots) in fill_stream_allocation_row_info() argument
1193 *slots = stream_allocation->slot_count; in fill_stream_allocation_row_info()
1196 *slots = 0; in fill_stream_allocation_row_info()
1209 uint32_t slots = 0; in dce110_link_encoder_update_mst_stream_allocation_table() local
1226 &slots); in dce110_link_encoder_update_mst_stream_allocation_table()
1229 slots = 0; in dce110_link_encoder_update_mst_stream_allocation_table()
1234 DP_MSE_SAT_SLOT_COUNT0, slots); in dce110_link_encoder_update_mst_stream_allocation_table()
1240 &slots); in dce110_link_encoder_update_mst_stream_allocation_table()
1243 slots = 0; in dce110_link_encoder_update_mst_stream_allocation_table()
1248 DP_MSE_SAT_SLOT_COUNT1, slots); in dce110_link_encoder_update_mst_stream_allocation_table()
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/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
HDdcn10_link_encoder.c1140 uint32_t *slots) in fill_stream_allocation_row_info() argument
1146 *slots = stream_allocation->slot_count; in fill_stream_allocation_row_info()
1149 *slots = 0; in fill_stream_allocation_row_info()
1162 uint32_t slots = 0; in dcn10_link_encoder_update_mst_stream_allocation_table() local
1180 &slots); in dcn10_link_encoder_update_mst_stream_allocation_table()
1183 slots = 0; in dcn10_link_encoder_update_mst_stream_allocation_table()
1188 DP_MSE_SAT_SLOT_COUNT0, slots); in dcn10_link_encoder_update_mst_stream_allocation_table()
1194 &slots); in dcn10_link_encoder_update_mst_stream_allocation_table()
1197 slots = 0; in dcn10_link_encoder_update_mst_stream_allocation_table()
1202 DP_MSE_SAT_SLOT_COUNT1, slots); in dcn10_link_encoder_update_mst_stream_allocation_table()
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/dragonfly/sys/dev/drm/radeon/
HDradeon_dp_mst.c65 int slots) in radeon_dp_mst_set_stream_attrib() argument
78 val = NI_DP_MSE_SAT_SLOT_COUNT0(slots) | NI_DP_MSE_SAT_SRC0(fe); in radeon_dp_mst_set_stream_attrib()
139 … new_attribs[idx].slots = drm_dp_mst_get_vcpi_slots(&mst_conn->mst_mgr, mst_enc->port); in radeon_dp_mst_update_stream_attribs()
145 new_attribs[i].slots != mst_conn->cur_stream_attribs[i].slots) { in radeon_dp_mst_update_stream_attribs()
146 … radeon_dp_mst_set_stream_attrib(primary, i, new_attribs[i].fe, new_attribs[i].slots); in radeon_dp_mst_update_stream_attribs()
148 mst_conn->cur_stream_attribs[i].slots = new_attribs[i].slots; in radeon_dp_mst_update_stream_attribs()
155 mst_conn->cur_stream_attribs[i].slots = 0; in radeon_dp_mst_update_stream_attribs()
394 int ret, slots; in radeon_mst_encoder_dpms() local
447 slots = drm_dp_find_vcpi_slots(&radeon_connector->mst_port->mst_mgr, in radeon_mst_encoder_dpms()
451 mst_enc->pbn, slots); in radeon_mst_encoder_dpms()
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/dragonfly/sys/dev/drm/i915/
HDintel_dp_mst.c44 int lane_count, slots; in intel_dp_mst_compute_config() local
75 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, in intel_dp_mst_compute_config()
77 if (slots < 0) { in intel_dp_mst_compute_config()
78 DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots); in intel_dp_mst_compute_config()
88 pipe_config->dp_m_n.tu = slots; in intel_dp_mst_compute_config()
100 int slots, ret = 0; in intel_dp_mst_atomic_check() local
108 slots = to_intel_crtc_state(crtc_state)->dp_m_n.tu; in intel_dp_mst_atomic_check()
109 if (drm_atomic_crtc_needs_modeset(crtc_state) && slots > 0) { in intel_dp_mst_atomic_check()
116 ret = drm_dp_atomic_release_vcpi_slots(state, mgr, slots); in intel_dp_mst_atomic_check()
118 DRM_DEBUG_KMS("failed releasing %d vcpi slots:%d\n", slots, ret); in intel_dp_mst_atomic_check()
/dragonfly/contrib/libarchive/libarchive/
HDarchive_read_set_format.c40 int r1, r2, slots, i; in archive_read_set_format() local
103 slots = sizeof(a->formats) / sizeof(a->formats[0]); in archive_read_set_format()
105 for (i = 0; i < slots; i++, a->format++) { in archive_read_set_format()
/dragonfly/contrib/lvm2/dist/lib/filters/
HDfilter-sysfs.c105 struct entry *slots[SET_BUCKETS]; member
141 e->next = ds->slots[h]; in _set_insert()
143 ds->slots[h] = e; in _set_insert()
153 for (e = ds->slots[h]; e; e = e->next) in _set_lookup()
/dragonfly/usr.sbin/ppp/
HDipcp.c106 u_char slots; member
374 ipcp->cfg.vj.slots, ipcp->cfg.vj.slotcomp ? "with" : "without"); in ipcp_Show()
414 int slots; in ipcp_vjset() local
416 slots = atoi(arg->argv[arg->argn+1]); in ipcp_vjset()
417 if (slots < 4 || slots > 16) in ipcp_vjset()
419 arg->bundle->ncp.ipcp.cfg.vj.slots = slots; in ipcp_vjset()
446 ipcp->cfg.vj.slots = DEF_VJ_STATES; in ipcp_Init()
574 ((ipcp->cfg.vj.slots - 1) << 8) + in ipcp_Setup()
578 sl_compress_init(&ipcp->vj.cslc, ipcp->cfg.vj.slots - 1); in ipcp_Setup()
771 req.slots = (ipcp->my_compproto >> 8) & 255; in IpcpSendConfigReq()
[all …]
/dragonfly/contrib/binutils-2.34/binutils/
HDrdcoff.c73 debug_type slots[COFF_SLOTS]; member
81 struct coff_slots *slots; member
111 pps = &types->slots; in coff_get_slot()
135 return (*pps)->slots + indx; in coff_get_slot()
682 types.slots = NULL; in parse_coff()
/dragonfly/contrib/binutils-2.27/binutils/
HDrdcoff.c73 debug_type slots[COFF_SLOTS]; member
81 struct coff_slots *slots; member
111 pps = &types->slots; in coff_get_slot()
135 return (*pps)->slots + indx; in coff_get_slot()
678 types.slots = NULL; in parse_coff()
/dragonfly/sys/dev/drm/amd/display/amdgpu_dm/
HDamdgpu_dm_helpers.c191 int slots = 0; in dm_helpers_dp_mst_write_payload_allocation_table() local
243 slots = drm_dp_find_vcpi_slots(mst_mgr, pbn); in dm_helpers_dp_mst_write_payload_allocation_table()
244 ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port, pbn, slots); in dm_helpers_dp_mst_write_payload_allocation_table()
/dragonfly/sys/dev/drm/include/linux/
HDradix-tree.h47 void *slots[RADIX_TREE_MAP_SIZE]; member
/dragonfly/sys/dev/drm/include/drm/
HDdrm_dp_mst_helper.h598 struct drm_dp_mst_port *port, int pbn, int slots);
633 int slots);
/dragonfly/sys/dev/drm/amd/display/include/
HDgrph_object_defs.h184 struct slot_layout_info slots[MAX_BOARD_SLOTS]; member

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