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Searched refs:to_intel_crtc_state (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/i915/
HDintel_color.c142 struct intel_crtc_state *intel_crtc_state = to_intel_crtc_state(crtc_state); in i9xx_load_csc_matrix()
353 to_intel_crtc_state(crtc_state)); in i9xx_load_luts()
364 to_intel_crtc_state(crtc_state); in haswell_load_luts()
469 struct intel_crtc_state *intel_state = to_intel_crtc_state(state); in broadwell_load_luts()
527 struct intel_crtc_state *intel_state = to_intel_crtc_state(state); in glk_load_luts()
559 to_intel_crtc_state(state)); in cherryview_load_luts()
602 i9xx_load_luts_internal(crtc, NULL, to_intel_crtc_state(state)); in cherryview_load_luts()
HDintel_atomic_plane.c227 return intel_plane_atomic_check_with_state(to_intel_crtc_state(old_crtc_state), in intel_plane_atomic_check()
228 to_intel_crtc_state(new_crtc_state), in intel_plane_atomic_check()
HDintel_display.c2754 to_intel_crtc_state(crtc->base.state); in intel_plane_disable_noatomic()
2863 intel_set_plane_visible(to_intel_crtc_state(crtc_state), in intel_find_initial_plane_obj()
10266 struct intel_crtc_state *pipe_config = to_intel_crtc_state(crtc_state); in intel_plane_atomic_calc_changes()
10281 to_intel_crtc_state(crtc_state), in intel_plane_atomic_calc_changes()
10305 to_intel_crtc_state(crtc_state)->active_planes &= ~BIT(plane->id); in intel_plane_atomic_calc_changes()
10403 to_intel_crtc_state(crtc_state); in intel_crtc_atomic_check()
10981 to_intel_crtc(crtc)->config = to_intel_crtc_state(new_crtc_state); in intel_modeset_update_crtc_state()
11361 sw_wm = &to_intel_crtc_state(new_state)->wm.skl.optimal; in verify_wm_state()
11552 pipe_config = to_intel_crtc_state(old_crtc_state); in verify_crtc_state()
11598 sw_config = to_intel_crtc_state(new_crtc_state); in verify_crtc_state()
[all …]
HDintel_drv.h892 #define to_intel_crtc_state(x) container_of(x, struct intel_crtc_state, base) macro
1204 return to_intel_crtc_state(drm_atomic_get_old_crtc_state(&state->base, in intel_atomic_get_old_crtc_state()
1212 return to_intel_crtc_state(drm_atomic_get_new_crtc_state(&state->base, in intel_atomic_get_new_crtc_state()
1961 return to_intel_crtc_state(crtc_state); in intel_atomic_get_crtc_state()
1973 return to_intel_crtc_state(crtc_state); in intel_atomic_get_existing_crtc_state()
HDintel_dp_mst.c108 slots = to_intel_crtc_state(crtc_state)->dp_m_n.tu; in intel_dp_mst_atomic_check()
120 to_intel_crtc_state(crtc_state)->dp_m_n.tu = 0; in intel_dp_mst_atomic_check()
HDintel_pm.c3694 cstate = to_intel_crtc_state(crtc->base.state); in intel_can_enable_sagv()
3774 *alloc = to_intel_crtc_state(for_crtc->state)->wm.skl.ddb; in skl_ddb_get_pipe_allocation_limits()
4836 struct intel_crtc_state *intel_cstate = to_intel_crtc_state(cstate); in skl_update_pipe_wm()
5076 to_intel_crtc_state(cstate); in skl_compute_wm()
5078 &to_intel_crtc_state(crtc->state)->wm.skl.optimal; in skl_compute_wm()
5285 cstate = to_intel_crtc_state(crtc->state); in skl_wm_get_hw_state()
5308 struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); in ilk_pipe_wm_get_hw_state()
5473 to_intel_crtc_state(crtc->base.state); in g4x_wm_get_hw_state()
5557 to_intel_crtc_state(crtc->base.state); in g4x_wm_sanitize()
5590 to_intel_crtc_state(crtc->base.state); in g4x_wm_sanitize()
[all …]
HDintel_fbc.c1094 intel_crtc_state = to_intel_crtc_state( in intel_fbc_choose_crtc()
HDi915_drv.h576 … (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \