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Searched refs:getRegisterInfo (Results 1 – 25 of 493) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
HDTargetFrameLoweringImpl.cpp52 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getFrameIndexReference()
85 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getCalleeSaves()
99 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in determineCalleeSaves()
152 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); in allocateScavengingFrameIndexesNearIncomingSP()
180 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getDwarfFrameBase()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
HDARMMCCodeEmitter.cpp547 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
587 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues()
922 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
923 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue()
981 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeImm12OpValue()
987 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue()
1058 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue()
1059 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg()); in getMveAddrModeRQOpValue()
1078 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeQOpValue()
1112 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getT2AddrModeImm8s4OpValue()
[all …]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/
HDXCoreMachineFunctionInfo.cpp46 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot()
64 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot()
77 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot()
HDXCoreSubtarget.h59 const TargetRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
60 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
HDMipsFrameLowering.cpp95 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP()
104 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP()
116 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
HDNVPTXPeephole.cpp98 MF.getSubtarget<NVPTXSubtarget>().getRegisterInfo(); in isCVTAToLocalCombinationCandidate()
117 MF.getSubtarget<NVPTXSubtarget>().getRegisterInfo(); in CombineCVTAToLocal()
154 MF.getSubtarget<NVPTXSubtarget>().getRegisterInfo(); in runOnMachineFunction()
HDNVPTXSubtarget.h66 const NVPTXRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
67 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/
HDCSKYMCCodeEmitter.cpp239 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
258 unsigned Imm = Ctx.getRegisterInfo()->getEncodingValue(Rz) - in getRegSeqImmOpValue()
259 Ctx.getRegisterInfo()->getEncodingValue(Ry); in getRegSeqImmOpValue()
261 return ((Ctx.getRegisterInfo()->getEncodingValue(Ry) << 5) | Imm); in getRegSeqImmOpValue()
269 Ctx.getRegisterInfo()->getEncodingValue(MI.getOperand(Op).getReg()); in getRegisterSeqOpValue()
271 Ctx.getRegisterInfo()->getEncodingValue(MI.getOperand(Op + 1).getReg()); in getRegisterSeqOpValue()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARC/
HDARCSubtarget.h58 const ARCRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
59 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Xtensa/
HDXtensaSubtarget.h54 const XtensaRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
55 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
HDLanaiSubtarget.h54 const LanaiRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
55 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/
HDVESubtarget.h55 const VERegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
56 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
HDLVLGen.cpp62 (MBB.getParent()->getSubtarget<VESubtarget>().getRegisterInfo()->getName(no)) in runOnMachineBasicBlock()
126 TRI = Subtarget.getRegisterInfo(); in runOnMachineFunction()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
HDMSP430Subtarget.h67 const MSP430RegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
68 return &getInstrInfo()->getRegisterInfo(); in getRegisterInfo()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
HDSparcSubtarget.h60 const SparcRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
61 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/
HDAVRSubtarget.h52 const AVRRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
53 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
HDWebAssemblySubtarget.h84 const WebAssemblyRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
85 return &getInstrInfo()->getRegisterInfo(); in getRegisterInfo()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/
HDBPFSubtarget.h108 const BPFRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
109 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/LoongArch/
HDLoongArchFrameLowering.cpp35 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); in hasFP()
45 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP()
143 const LoongArchRegisterInfo *RI = STI.getRegisterInfo(); in processFunctionBeforeFrameFinalized()
184 const LoongArchRegisterInfo *RI = STI.getRegisterInfo(); in emitPrologue()
308 const LoongArchRegisterInfo *RI = STI.getRegisterInfo(); in emitEpilogue()
457 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getFrameIndexReference()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDSILowerSGPRSpills.cpp92 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in insertCSRSaves()
94 const SIRegisterInfo *RI = ST.getRegisterInfo(); in insertCSRSaves()
135 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in insertCSRRestores()
137 const SIRegisterInfo *RI = ST.getRegisterInfo(); in insertCSRRestores()
312 TRI = &TII->getRegisterInfo(); in runOnMachineFunction()
HDR600Subtarget.h60 const R600RegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
61 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
HDSILowerI1Copies.h76 return TII->getRegisterInfo().isSGPRReg(*MRI, Reg) && in isLaneMaskReg()
77 TII->getRegisterInfo().getRegSizeInBits(Reg, *MRI) == in isLaneMaskReg()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
HDSystemZSubtarget.h77 const SystemZRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
78 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
HDRISCVFrameLowering.cpp65 const llvm::RISCVRegisterInfo *TRI = STI.getRegisterInfo(); in emitSCSPrologue()
127 Register RAReg = STI.getRegisterInfo()->getRARegister(); in emitSCSEpilogue()
160 nullptr, STI.getRegisterInfo()->getDwarfRegNum(SCSPReg, /*IsEH*/ true))); in emitSCSEpilogue()
313 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); in hasFP()
323 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP()
356 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in determineFrameLayout()
436 const RISCVRegisterInfo &RI = *STI.getRegisterInfo(); in adjustStackForRVV()
529 const RISCVRegisterInfo *RI = STI.getRegisterInfo(); in emitPrologue()
721 const RISCVRegisterInfo *RI = STI.getRegisterInfo(); in emitPrologue()
760 const RISCVRegisterInfo *RI = STI.getRegisterInfo(); in emitEpilogue()
[all …]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SPIRV/
HDSPIRVSubtarget.h124 const SPIRVRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
125 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()

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