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Searched refs:AR_RTC_PLL_DIV (Results 1 – 3 of 3) sorted by relevance

/netbsd/src/sys/external/isc/atheros_hal/dist/ar5416/
Dar5416reg.h316 #define AR_RTC_PLL_DIV 0x0000001f macro
Dar5416_reset.c1236 pll |= SM(0xa, AR_RTC_PLL_DIV); in ar5416InitPLL()
1238 pll |= SM(0xb, AR_RTC_PLL_DIV); in ar5416InitPLL()
/netbsd/src/sys/dev/ic/
Dathn.c819 pll |= SM(AR_RTC_PLL_DIV, 0x0a); in athn_init_pll()
821 pll |= SM(AR_RTC_PLL_DIV, 0x0b); in athn_init_pll()