Searched refs:CORTEXA5_ACTLR_EXCL (Results 1 – 2 of 2) sorted by relevance
288 #define CORTEXA5_ACTLR_EXCL __BIT(7) /* Exclusive L1/L2 cache control */ macro
2990 actlr_clr = CORTEXA5_ACTLR_EXCL; in armv7_setup()