Searched refs:FPSR (Results 1 – 25 of 40) sorted by relevance
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13 AR[FPSR].sf0.controls; IC:mov-to-AR-FPSR, fsetc.s0; IC:mov-to-AR-FPSR, fsetc.s0; impliedF14 AR[FPSR].sf1.controls; IC:mov-to-AR-FPSR, fsetc.s1; IC:mov-to-AR-FPSR, fsetc.s1; impliedF15 AR[FPSR].sf2.controls; IC:mov-to-AR-FPSR, fsetc.s2; IC:mov-to-AR-FPSR, fsetc.s2; impliedF16 AR[FPSR].sf3.controls; IC:mov-to-AR-FPSR, fsetc.s3; IC:mov-to-AR-FPSR, fsetc.s3; impliedF17 AR[FPSR].sf0.flags; IC:fp-arith-s0, IC:fcmp-s0, IC:fpcmp-s0; IC:fp-arith-s0, IC:fcmp-s0, I…18 AR[FPSR].sf0.flags; fclrf.s0, IC:fcmp-s0, IC:fp-arith-s0, IC:fpcmp-s0, IC:mov-to-AR-FPSR; fclrf.s0,…19 AR[FPSR].sf1.flags; IC:fp-arith-s1, IC:fcmp-s1, IC:fpcmp-s1; IC:fp-arith-s1, IC:fcmp-s1, I…20 AR[FPSR].sf1.flags; fclrf.s1, IC:fcmp-s1, IC:fp-arith-s1, IC:fpcmp-s1, IC:mov-to-AR-FPSR; fclrf.s1,…21 AR[FPSR].sf2.flags; IC:fp-arith-s2, IC:fcmp-s2, IC:fpcmp-s2; IC:fp-arith-s2, IC:fcmp-s2, I…22 AR[FPSR].sf2.flags; fclrf.s2, IC:fcmp-s2, IC:fp-arith-s2, IC:fpcmp-s2, IC:mov-to-AR-FPSR; fclrf.s2,…[all …]
13 AR[FPSR].sf0.controls; IC:mov-to-AR-FPSR, fsetc.s0; br.ia, IC:fp-arith-s0, IC:fcmp-s0, IC:f…14 AR[FPSR].sf1.controls; IC:mov-to-AR-FPSR, fsetc.s1; br.ia, IC:fp-arith-s1, IC:fcmp-s1, IC:f…15 AR[FPSR].sf2.controls; IC:mov-to-AR-FPSR, fsetc.s2; br.ia, IC:fp-arith-s2, IC:fcmp-s2, IC:f…16 AR[FPSR].sf3.controls; IC:mov-to-AR-FPSR, fsetc.s3; br.ia, IC:fp-arith-s3, IC:fcmp-s3, IC:f…17 AR[FPSR].sf0.flags; IC:fp-arith-s0, fclrf.s0, IC:fcmp-s0, IC:fpcmp-s0, IC:mov-to-AR-FPSR; br.ia, fc…18 AR[FPSR].sf1.flags; IC:fp-arith-s1, fclrf.s1, IC:fcmp-s1, IC:fpcmp-s1, IC:mov-to-AR-FPSR; br.ia, fc…19 AR[FPSR].sf2.flags; IC:fp-arith-s2, fclrf.s2, IC:fcmp-s2, IC:fpcmp-s2, IC:mov-to-AR-FPSR; br.ia, fc…20 AR[FPSR].sf3.flags; IC:fp-arith-s3, fclrf.s3, IC:fcmp-s3, IC:fpcmp-s3, IC:mov-to-AR-FPSR; br.ia, fc…21 AR[FPSR].traps; IC:mov-to-AR-FPSR; br.ia, IC:fp-arith, fchkf, fcmp, fpcmp, IC:mov-from-AR-FPSR…22 AR[FPSR].rv; IC:mov-to-AR-FPSR; br.ia, IC:fp-arith, fchkf, fcmp, fpcmp, IC:mov-from-AR-FPSR…
81 mov-from-AR-FPSR; IC:mov-from-AR-M[Field(ar3) == FPSR]150 mov-to-AR-FPSR; IC:mov-to-AR-M[Field(ar3) == FPSR]
145 #define FPSR (FPU_SR[6]) macro205 ((FPSR >> 24) &0xf)208 (FPSR &= ~(1 << (bbb+24)))211 (FPSR |= 1 << (bbb+24))214 ((FPSR & (1 << (bbb+24))) != 0)217 (((FPSR & FPSR_RM) == FPSR_RN) ? sim_fpu_round_near \218 : ((FPSR & FPSR_RM) == 0x00040000) ? sim_fpu_round_up \219 : ((FPSR & FPSR_RM) == 0x00080000) ? sim_fpu_round_down \
1066 unsigned int val = FPSR & ~(FPSR_PR | FPSR_XC | FPSR_XP);1080 FPSR = val;1084 unsigned int val = FPSR & ~(FPSR_RM | FPSR_XE);1092 FPSR = val;2114 sreg = ((FPSR & FPSR_PR) ? FPST_PR : 0)2115 | ((FPSR & FPSR_XCE) ? FPST_XCE : 0)2116 | ((FPSR & FPSR_XCV) ? FPST_XCV : 0)2117 | ((FPSR & FPSR_XCZ) ? FPST_XCZ : 0)2118 | ((FPSR & FPSR_XCO) ? FPST_XCO : 0)2119 | ((FPSR & FPSR_XCU) ? FPST_XCU : 0)[all …]
2810 unsigned int fpsr = FPSR & mask; in update_fpsr()2858 FPSR &= ~FPSR_XC; in update_fpsr()2859 FPSR |= flags; in update_fpsr()2880 || !(FPSR & (double_op_p ? FPSR_DEM : FPSR_SEM))) in SignalExceptionFPE()2884 EIIC = (FPSR & (double_op_p ? FPSR_DEM : FPSR_SEM)) in SignalExceptionFPE()2896 if ((FPSR & FPSR_XEI) in check_invalid_snan()2899 FPSR &= ~FPSR_XC; in check_invalid_snan()2900 FPSR |= FPSR_XCV; in check_invalid_snan()2901 FPSR |= FPSR_XPV; in check_invalid_snan()2915 if (FPSR & FPSR_XEV) in v850_float_compare()[all …]
77 * set FPSR exception status dz bit, condition code 83 * set exception status bit & accrued bits in FPSR93 bset.b #neg_bit,FPSR_CC(a6) ;set neg bit in FPSR94 fmove.l #0,FPSR ;clr status bits (Z set)99 fmove.l #0,FPSR ;clr status bits (Z set)110 bset.b #neg_bit,FPSR_CC(a6) ;set neg bit in FPSR123 bset.b #neg_bit,FPSR_CC(a6) ;set neg bit in FPSR132 * set FPSR exception status operr bit, condition code 137 * set FPSR exception status operr bit, accrued operr bit292 * the inex2 exception bits set in the FPSR. If the underflow bit[all …]
132 USER_FPSR equ LV+68 ;saved user FPSR133 FPSR_CC equ USER_FPSR+0 ; FPSR condition code134 FPSR_QBYTE equ USER_FPSR+1 ; FPSR quotient135 FPSR_EXCEPT equ USER_FPSR+2 ; FPSR exception136 FPSR_AEXCEPT equ USER_FPSR+3 ; FPSR accrued exception178 * FPSR/FPCR bits202 * FPSR individual bit masks224 * FPSR combinations used in the FPSP
120 USER_FPSR equ LV+68 ;saved user FPSR121 FPSR_CC equ USER_FPSR+0 ; FPSR condition code122 FPSR_QBYTE equ USER_FPSR+1 ; FPSR quotient123 FPSR_EXCEPT equ USER_FPSR+2 ; FPSR exception124 FPSR_AEXCEPT equ USER_FPSR+3 ; FPSR accrued exception
81 * The following lines are used to ensure that the FPSR87 fmove.l #0,FPSR ;clear all user bits
81 fmove.l #0,FPSR ;clear all user status bits84 * The following lines are used to ensure that the FPSR
112 * Or in the FPSR from the emulation with the USER_FPSR on the stack.114 fmove.l FPSR,d0 143 * Or in the FPSR from the emulation with the USER_FPSR on the stack.145 fmove.l FPSR,d0 159 * Or in the FPSR from the emulation with the USER_FPSR on the stack.161 fmove.l FPSR,d0
266 * This sample handler simply clears the nan bit in the FPSR.279 fmove.l FPSR,-(sp)281 fmove.l (sp)+,FPSR
293 fmove.l #0,FPSR ;zero all of fpsr - nothing needed473 fmove.l #0,FPSR ;clr INEX 553 * d0: FPCR with RZ mode/FPSR with INEX2 isolated568 fmove.l FPSR,d0 ;get FPSR594 * d0: FPSR with AINEX cleared/FPCR with size set to ext942 fmove.l #0,FPSR ;clear possible inex2/ainex bits
273 * This sample handler simply clears the nan bit in the FPSR.284 fmove.l FPSR,-(sp)286 fmove.l (sp)+,FPSR
197 fmove.l #0,FPSR ;clr N flag507 fmovem.x PONE,fp1 ;do not allow FPSR to be affected529 * stacked FPSR to be correctly reported.
39 * routines and restores all but FP0 on exit. The FPSR is
7145 fmov.l %fpsr,%d1 # fetch FPSR7191 fmov.l %fpsr,%d1 # fetch FPSR7237 fmov.l %fpsr,%d1 # fetch FPSR7610 fmov.l &0x0,%fpsr # clear FPSR7615 fmov.l %fpsr,%d0 # save FPSR8185 fmov.l &0x0,%fpsr # clear FPSR8223 fmov.l &0x0,%fpsr # clear FPSR8261 fmov.l &0x0,%fpsr # clear FPSR8296 fmov.l &0x0,%fpsr # clear FPSR8324 fmov.l &0x0,%fpsr # clear FPSR[all …]
197 # bit in the FPSR, and does an "rte". The instruction that caused the 198 # bsun will now be re-executed but with the NaN FPSR bit cleared.
4063 fmov.l &0x0,%fpsr # clear FPSR11753 fmov.l &0x0,%fpsr # clear FPSR11791 fmov.l &0x0,%fpsr # clear FPSR11829 fmov.l &0x0,%fpsr # clear FPSR11864 fmov.l &0x0,%fpsr # clear FPSR11892 fmov.l &0x0,%fpsr # clear FPSR12162 fmov.l &0x0,%fpsr # clear FPSR12167 fmov.l %fpsr,%d1 # save FPSR12252 fmov.l &0x0,%fpsr # clear FPSR12258 fmov.l %fpsr,%d1 # save FPSR[all …]
46 Inexact FPSR bit. Emulation now does not set Inexact for
119 Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR }; enumerator