| /netbsd/src/sys/arch/arm/at91/ |
| D | at91spi.c | 97 #define GETREG(sc, x) \ macro
190 if (GETREG(sc, SPI_SR) & SPI_SR_RDRF) in at91spi_attach_common()
191 (void)GETREG(sc, SPI_RDR); in at91spi_attach_common()
209 csr = GETREG(sc, SPI_CSR(0)); /* read register */ in at91spi_configure()
256 if (GETREG(sc, AUPSC_SPISTAT) & SPISTAT_DR) { in at91spi_configure()
279 …if (((sr = GETREG(sc, SPI_SR)) & (SPI_SR_ENDTX | SPI_SR_ENDRX)) != (SPI_SR_ENDTX | SPI_SR_ENDRX)) { in at91spi_xfer()
343 GETREG(sc, SPI_MR), GETREG(sc, SPI_SR), in at91spi_xfer()
344 GETREG(sc, SPI_IMR), GETREG(sc, SPI_CSR(0)))); in at91spi_xfer()
429 if ((imr = GETREG(sc, SPI_IMR)) == 0) { in at91spi_intr()
435 sr = GETREG(sc, SPI_SR); in at91spi_intr()
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| /netbsd/src/sys/arch/mips/alchemy/dev/ |
| D | auspi.c | 106 #define GETREG(sc, x) \ macro
179 reg = GETREG(sc, AUPSC_SPICFG); in auspi_configure()
244 if (GETREG(sc, AUPSC_SPISTAT) & SPISTAT_DR) { in auspi_configure()
264 if (GETREG(sc, AUPSC_SPISTAT) & SPISTAT_TF) { in auspi_send()
298 if ((GETREG(sc, AUPSC_SPISTAT) & SPISTAT_RE) != 0) { in auspi_recv()
303 data = GETREG(sc, AUPSC_SPITXRX); in auspi_recv()
372 if ((GETREG(sc, AUPSC_SPISTAT) & SPISTAT_DI) == 0) { in auspi_intr()
376 ev = GETREG(sc, AUPSC_SPIEVNT); in auspi_intr()
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| D | aurtc.c | 88 #define GETREG(x) (REGVAL(x)) macro
146 tv->tv_sec = GETREG(PC_COUNTER_READ_0); in aurtc_gettime()
162 while (GETREG(PC_COUNTER_CONTROL) & CC_C0S) { in aurtc_settime()
182 while (GETREG(PC_COUNTER_CONTROL) & CC_C0S) { in aurtc_shutdown()
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| D | augpio.c | 72 #define GETREG(x) \ macro
77 #define GETGPIO(x) GETREG(GPIO_BASE + (x))
79 #define GETGPIO2(x) GETREG(GPIO2_BASE + (x))
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| /netbsd/src/sys/arch/mips/atheros/dev/ |
| D | argpio.c | 91 #define GETREG(sc, o) bus_space_read_4(sc->sc_st, sc->sc_sh, o) macro
168 reg = GETREG(sc, GPIO_CR); in argpio_attach()
217 reg = GETREG(sc, GPIO_CR); in argpio_ctl()
239 reg = GETREG(sc, GPIO_DO); in argpio_write()
253 return ((GETREG(sc, GPIO_DI) & (1 << pin)) ? in argpio_read()
268 GETREG(sc, GPIO_CR) | INTR(sc->sc_rstpin)); in argpio_reset_pressed()
281 PUTREG(sc, GPIO_CR, GETREG(sc, GPIO_CR) & ~INTR(sc->sc_rstpin)); in argpio_intr()
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| D | arspi.c | 132 #define GETREG(sc, o) bus_space_read_4(sc->sc_st, sc->sc_sh, o) macro
222 while (GETREG(sc, ARSPI_REG_CTL) & ARSPI_CTL_BUSY); in arspi_intr()
304 ctl = GETREG(sc, ARSPI_REG_CTL); in arspi_sched()
357 if ((GETREG(sc, ARSPI_REG_DATA) & in arspi_done()
378 job->job_data = GETREG(sc, ARSPI_REG_DATA); in arspi_done()
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| /netbsd/src/sys/dev/marvell/ |
| D | mvspi.c | 78 #define GETREG(sc, x) \ macro
127 ctl = GETREG(sc, MVSPI_INTCONF_REG); in mvspi_attach()
276 ctl = GETREG(sc, MVSPI_CTRL_REG); in mvspi_assert()
284 int ctl = GETREG(sc, MVSPI_CTRL_REG); in mvspi_deassert()
315 ctl = GETREG(sc, MVSPI_CTRL_REG); in mvspi_sched()
330 if (GETREG(sc, MVSPI_CTRL_REG) & in mvspi_sched()
347 GETREG(sc, MVSPI_DATAIN_REG); in mvspi_sched()
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| /netbsd/src/sys/dev/ic/ |
| D | smc90cx6.c | 136 #define GETREG(off) bus_space_read_1(bst_r, regs, (off)) macro
163 } while (!(GETREG(BAHSTAT) & BAH_POR)); in bah_attach_subr()
261 } while (!(GETREG(BAHSTAT) & BAH_POR)); in bah_reset()
280 device_xname(sc->sc_dev), GETREG(BAHSTAT)); in bah_reset()
286 device_xname(sc->sc_dev), GETREG(BAHSTAT)); in bah_reset()
302 device_xname(sc->sc_dev), GETREG(BAHSTAT)); in bah_reset()
692 device_xname(sc->sc_dev), buffer, GETREG(BAHSTAT)); in bah_tint()
703 device_xname(sc->sc_dev), GETREG(BAHSTAT)); in bah_tint()
733 isr = GETREG(BAHSTAT); in bahintr()
832 GETREG(BAHSTAT)); in bahintr()
[all …]
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| /netbsd/src/external/gpl3/gcc/dist/gcc/ |
| D | ChangeLog-2014 | 8551 set_qregoi, set_qregci, set_qregxi): Change qualifiers to GETREG.
|