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Searched refs:GICD_ICFGRn (Results 1 – 3 of 3) sorted by relevance

/netbsd/src/sys/arch/arm/cortex/
Dgic_reg.h135 #define GICD_ICFGRn(n) (0xC00+4*(n)) // Interrupt Configuration Registers macro
295 #define GICv1_ICDICRn(n) GICD_ICFGRn(n)
Dgicv3.c215 icfg = gicd_read_4(sc, GICD_ICFGRn(is->is_irq / 16)); in gicv3_establish_irq()
220 gicd_write_4(sc, GICD_ICFGRn(is->is_irq / 16), icfg); in gicv3_establish_irq()
278 gicd_write_4(sc, GICD_ICFGRn(n / 16), 0); in gicv3_dist_enable()
Dgic.c431 const bus_size_t cfg_reg = GICD_ICFGRn(is->is_irq / 16); in armgic_establish_irq()