Searched refs:MII_PHYIDR1 (Results 1 – 7 of 7) sorted by relevance
| /netbsd/src/sys/dev/mii/ |
| D | mii.h | 102 #define MII_PHYIDR1 0x02 /* ID register 1 (ro) */ macro
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| D | etphy.c | 275 PHY_READ(sc, MII_PHYIDR1, ®); in etphy_reset()
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| D | mii.c | 161 MII_PHYIDR1, &ma.mii_id1); in mii_attach()
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| /netbsd/src/sys/dev/usb/ |
| D | if_url.c | 571 case MII_PHYIDR1: in url_uno_mii_read_reg()
625 case MII_PHYIDR1: in url_uno_mii_write_reg()
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| /netbsd/src/sys/dev/ic/ |
| D | rtl8169.c | 329 case MII_PHYIDR1: in re_miibus_readreg()
398 case MII_PHYIDR1: in re_miibus_writereg()
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| D | rtl81x9.c | 440 case MII_PHYIDR1: in rtk_phy_readreg()
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| /netbsd/src/sys/dev/pci/ |
| D | if_wm.c | 13266 rv = sc->phy.readreg_locked(sc->sc_dev, i, MII_PHYIDR1, &id1); in wm_sgmii_sfp_preconfig()
17945 rv = wm_gmii_hv_readreg_locked(sc->sc_dev, 2, MII_PHYIDR1, in wm_phy_is_accessible_pchlan()
17965 rv = wm_gmii_hv_readreg_locked(sc->sc_dev, 2, MII_PHYIDR1, in wm_phy_is_accessible_pchlan()
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