Searched refs:MPU0_SR (Results 1 – 3 of 3) sorted by relevance
94 #define MPU0_SR (V850_SIM_CPU (CPU)->reg.mpu0_sregs) macro277 #define VIP (MPU0_SR[0])278 #define VMECR (MPU0_SR[4])279 #define VMTID (MPU0_SR[5])280 #define VMADR (MPU0_SR[6])281 #define VPECR (MPU0_SR[8])282 #define VPTID (MPU0_SR[9])283 #define VPADR (MPU0_SR[10])284 #define VDECR (MPU0_SR[12])285 #define VDTID (MPU0_SR[13])
1043 MPU0_SR[regID] = sreg;2106 sreg = MPU0_SR[regID];
555 (MPU0_SR, MPU1_SR, FPU_SR): New macros for accessing new fields