Searched refs:MPU1_SR (Results 1 – 3 of 3) sorted by relevance
95 #define MPU1_SR (V850_SIM_CPU (CPU)->reg.mpu1_sregs) macro244 #define MPM (MPU1_SR[0])245 #define MPC (MPU1_SR[1])247 #define TID (MPU1_SR[2])248 #define PPA (MPU1_SR[3])249 #define PPM (MPU1_SR[4])250 #define PPC (MPU1_SR[5])251 #define DCC (MPU1_SR[6])252 #define DCV0 (MPU1_SR[7])253 #define DCV1 (MPU1_SR[8])[all …]
1060 MPU1_SR[regID] = sreg;2109 sreg = MPU1_SR[regID];
555 (MPU0_SR, MPU1_SR, FPU_SR): New macros for accessing new fields