Searched refs:MTC1 (Results 1 – 5 of 5) sorted by relevance
| /netbsd/src/sys/external/bsd/sljit/dist/sljit_src/ |
| D | sljitNativeMIPS_common.c | 148 #define MTC1 (HI(17) | (4 << 21)) macro
1317 … FAIL_IF(push_inst(compiler, MTC1 | flags | T(src) | FS(TMP_FREG1), MOVABLE_INS)); in sljit_emit_fop1_conv_f64_from_sw()
1328 … FAIL_IF(push_inst(compiler, MTC1 | flags | T(TMP_REG1) | FS(TMP_FREG1), MOVABLE_INS)); in sljit_emit_fop1_conv_f64_from_sw()
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| /netbsd/src/external/gpl3/gcc/dist/gcc/config/mips/ |
| D | 74k.md | 472 ;; fxfer (MTC1, DMTC1: latency is 4) (MFC1, DMFC1: latency is 1)
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| /netbsd/src/external/gpl3/gdb/dist/sim/mips/ |
| D | micromips.igen | 1573 010101,5.RT,5.FS,0010100000,111011:POOL32F:32,f::MTC1
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| D | ChangeLog-2021 | 2948 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2954 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
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| /netbsd/src/external/gpl3/binutils/dist/gas/ |
| D | ChangeLog-2019 | 1782 respect to MTC1 and use $0 for either part where possible.
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