Searched refs:REG_A0 (Results 1 – 14 of 14) sorted by relevance
51 State.regs[REG_A0 + AN0] = State.regs[REG_D0 + DM1];64 State.regs[REG_D0 + DN0] = State.regs[REG_A0 + AM1];77 State.regs[REG_A0+AN0] = IMM8;90 State.regs[REG_A0+AN0] = State.regs[REG_A0+AM1];103 State.regs[REG_A0 + AN0] = State.regs[REG_SP];116 State.regs[REG_SP] = State.regs[REG_A0 + AM1];181 State.regs[REG_D0 + DN1] = load_word (State.regs[REG_A0 + AM0]);195 = load_word ((State.regs[REG_A0 + AM0] + EXTEND8 (D8)));209 = load_word ((State.regs[REG_A0 + AM0] + EXTEND16 (FETCH16(D16A, D16B))));223 = load_word ((State.regs[REG_A0 + AM0][all …]
66 #define REG_A0 4 macro
15 return REG_A0 + rreg - 8;48 State.regs[REG_A0 + AN0] = State.regs[REG_USP];59 State.regs[REG_A0 + AN0] = State.regs[REG_SSP];70 State.regs[REG_A0 + AN0] = State.regs[REG_MSP];81 State.regs[REG_A0 + AN0] = PC;92 State.regs[REG_USP] = State.regs[REG_A0 + AM1];102 State.regs[REG_SSP] = State.regs[REG_A0 + AM1];112 State.regs[REG_MSP] = State.regs[REG_A0 + AM1];164 State.regs[destreg] = State.regs[REG_A0 + AM1];188 State.regs[REG_A0 + AN0] = State.regs[destreg];[all …]
1800 (REG_D0, REG_A0, REG_SP): Define.
438 REG_A0, REG_A1, \655 : (REGNO) == REG_A0 || (REGNO) == REG_A1 ? AREGS \
426 if (i == REG_A0 || i == REG_A1) in expand_prologue_reg_save()464 if (i == REG_A0 || i == REG_A1) in expand_epilogue_reg_restore()657 n += i == REG_A0 || i == REG_A1 ? 2 : 1; in n_regs_saved_by_prologue()1452 if (REGNO (x) == REG_A0 || REGNO (x) == REG_A1) in print_operand()1459 if (REGNO (x) == REG_A0 || REGNO (x) == REG_A1) in print_operand()1466 if (REGNO (x) == REG_A0) in print_operand()2110 if (mode == PDImode && (regno == REG_A0 || regno == REG_A1)) in bfin_hard_regno_nregs()2112 if (mode == V2PDImode && (regno == REG_A0 || regno == REG_A1)) in bfin_hard_regno_nregs()2135 return regno == REG_A0 || regno == REG_A1; in bfin_hard_regno_mode_ok()2190 if (TEST_HARD_REG_BIT (reg_class_contents[class1], REG_A0) in bfin_register_move_cost()[all …]
100 (REG_A0 32)1566 (clobber (reg:PDI REG_A0))1573 rtx a0reg = gen_rtx_REG (PDImode, REG_A0);1617 (clobber (reg:PDI REG_A0))1624 rtx a0reg = gen_rtx_REG (PDImode, REG_A0);
109 REG_A0 = 0xc0, REG_A1, REG_CC, enumerator
1642 if ($3.regno == REG_A0 && $5.regno == REG_A1)1652 if ($3.regno == REG_A0 && $5.regno == REG_A1)1711 if ($3.regno == REG_A0 && $5.regno == REG_A1)2279 && $7.regno == REG_A02292 && $7.regno == REG_A0
244 [aA]0 _REG.regno = REG_A0; return REG_A_DOUBLE_ZERO;
4006 if ((yyvsp[-2].reg).regno == REG_A0 && (yyvsp[0].reg).regno == REG_A1) in yyparse()4020 if ((yyvsp[-2].reg).regno == REG_A0 && (yyvsp[0].reg).regno == REG_A1) in yyparse()4099 if ((yyvsp[-2].reg).regno == REG_A0 && (yyvsp[0].reg).regno == REG_A1) in yyparse()4772 && (yyvsp[-3].reg).regno == REG_A0 in yyparse()4788 && (yyvsp[-3].reg).regno == REG_A0 in yyparse()
2005 _REG.regno = REG_A0; return REG_A_DOUBLE_ZERO;
218 REG_A0, REG_A1, REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, enumerator