Searched refs:SHADDR (Results 1 – 8 of 8) sorted by relevance
| /netbsd/src/sys/dev/microcode/aic7xxx/ |
| D | aic7xxx.seq | 1088 mov SCB_RESIDUAL_DATACNT[3], SHADDR;
1166 * Reload HADDR from SHADDR and setup the
1170 bmov HADDR, SHADDR, 4;
1175 mvi SHADDR call bcopy_4;
1730 * we can only ack the message after SHADDR has been saved. On these
1731 * chips, SHADDR increments with every bus transaction, even PIO.
1758 * and the SCB_DATAPTR becomes the current SHADDR.
1763 bmov SCB_DATAPTR, SHADDR, 4;
1770 mvi SHADDR call bcopy_4;
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| D | aic7xxx.reg | 416 * manner as STCNT is counted down. SHADDR should always be used
420 register SHADDR {
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| D | aic7xxx_reg.h | 1228 #define SHADDR 0x14 macro
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| D | aic79xx.seq | 1157 * The SCB_DATAPTR becomes the current SHADDR.
1161 bmov SCB_DATAPTR, SHADDR, 8;
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| D | aic79xx_reg.h | 3004 #define SHADDR 0x60 macro
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| D | aic79xx.reg | 2438 register SHADDR {
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| /netbsd/src/sys/dev/ic/ |
| D | aic7xxx.c | 3615 data_addr = (ahc_inb(ahc, SHADDR + 3) << 24) in ahc_handle_ign_wide_residue()
3616 | (ahc_inb(ahc, SHADDR + 2) << 16) in ahc_handle_ign_wide_residue()
3617 | (ahc_inb(ahc, SHADDR + 1) << 8) in ahc_handle_ign_wide_residue()
3618 | (ahc_inb(ahc, SHADDR)); in ahc_handle_ign_wide_residue()
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| D | aic79xx.c | 693 ahd_outq(ahd, SCB_DATAPTR, ahd_inq(ahd, SHADDR)); in ahd_run_data_fifo()
4805 data_addr = ahd_inq(ahd, SHADDR); in ahd_handle_ign_wide_residue()
8821 ahd_inl(ahd, SHADDR+4), in ahd_dump_card_state()
8822 ahd_inl(ahd, SHADDR), in ahd_dump_card_state()
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