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Searched refs:VECTOR (Results 1 – 25 of 32) sorted by relevance

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/netbsd/src/sys/arch/x68k/x68k/
Dvectors.s40 VECTOR(illinst) /* 4: illegal instruction */
41 VECTOR(zerodiv) /* 5: zero divide */
42 VECTOR(chkinst) /* 6: CHK instruction */
43 VECTOR(trapvinst) /* 7: TRAPV instruction */
44 VECTOR(privinst) /* 8: privilege violation */
45 VECTOR(trace) /* 9: trace */
46 VECTOR(illinst) /* 10: line 1010 emulator */
47 VECTOR(fpfline) /* 11: line 1111 emulator */
48 VECTOR(badtrap) /* 12: unassigned, reserved */
49 VECTOR(coperr) /* 13: coprocessor protocol violation */
[all …]
/netbsd/src/sys/arch/amiga/amiga/
Dvectors.s40 VECTOR(buserr) /* 2: bus error */
41 VECTOR(addrerr) /* 3: address error */
42 VECTOR(illinst) /* 4: illegal instruction */
43 VECTOR(zerodiv) /* 5: zero divide */
44 VECTOR(chkinst) /* 6: CHK instruction */
45 VECTOR(trapvinst) /* 7: TRAPV instruction */
46 VECTOR(privinst) /* 8: privilege violation */
47 VECTOR(trace) /* 9: trace */
48 VECTOR(illinst) /* 10: line 1010 emulator */
49 VECTOR(fpfline) /* 11: line 1111 emulator */
[all …]
/netbsd/src/sys/arch/atari/atari/
Dvectors.s39 VECTOR(buserr) | 2: bus error
40 VECTOR(addrerr) | 3: address error
41 VECTOR(illinst) | 4: illegal instruction
42 VECTOR(zerodiv) | 5: zero divide
43 VECTOR(chkinst) | 6: CHK instruction
44 VECTOR(trapvinst) | 7: TRAPV instruction
45 VECTOR(privinst) | 8: privilege violation
46 VECTOR(trace) | 9: trace
47 VECTOR(illinst) | 10: line 1010 emulator
48 VECTOR(fpfline) | 11: line 1111 emulator
[all …]
/netbsd/src/sys/arch/mac68k/mac68k/
Dvectors.s35 VECTOR(badtrap) ; VECTOR(badtrap) ; \
36 VECTOR(badtrap) ; VECTOR(badtrap) ; \
37 VECTOR(badtrap) ; VECTOR(badtrap) ; \
38 VECTOR(badtrap) ; VECTOR(badtrap) ; \
39 VECTOR(badtrap) ; VECTOR(badtrap) ; \
40 VECTOR(badtrap) ; VECTOR(badtrap) ; \
41 VECTOR(badtrap) ; VECTOR(badtrap) ; \
42 VECTOR(badtrap) ; VECTOR(badtrap)
50 VECTOR(illinst) /* 4: illegal instruction */
51 VECTOR(zerodiv) /* 5: zero divide */
[all …]
/netbsd/src/sys/arch/evbcf/evbcf/
Dvectors.S43 VECTOR(badtrap) ; VECTOR(badtrap) ; \
44 VECTOR(badtrap) ; VECTOR(badtrap) ; \
45 VECTOR(badtrap) ; VECTOR(badtrap) ; \
46 VECTOR(badtrap) ; VECTOR(badtrap) ; \
47 VECTOR(badtrap) ; VECTOR(badtrap) ; \
48 VECTOR(badtrap) ; VECTOR(badtrap) ; \
49 VECTOR(badtrap) ; VECTOR(badtrap) ; \
50 VECTOR(badtrap) ; VECTOR(badtrap)
61 VECTOR(accesserror) /* 2: bus error */
62 VECTOR(addresserror) /* 3: address error */
[all …]
/netbsd/src/sys/arch/luna68k/stand/boot/
Dlocore.S111 VECTOR(buserr) /* 2: bus error */
112 VECTOR(addrerr) /* 3: address error */
113 VECTOR(illinst) /* 4: illegal instruction */
114 VECTOR(zerodiv) /* 5: zero divide */
115 VECTOR(chkinst) /* 6: CHK instruction */
116 VECTOR(trapvinst) /* 7: TRAPV instruction */
117 VECTOR(privinst) /* 8: privilege violation */
118 VECTOR(badtrap) /* 9: trace */
119 VECTOR(illinst) /* 10: line 1010 emulator */
120 VECTOR(illinst) /* 11: line 1111 emulator */
[all …]
/netbsd/src/external/gpl3/gdb/dist/gdb/testsuite/gdb.base/
Dgnu_vector.c22 #define VECTOR(n, type) \ macro
25 typedef VECTOR (8, int) int8;
27 typedef VECTOR (4, int) int4;
28 typedef VECTOR (4, unsigned int) uint4;
29 typedef VECTOR (4, char) char4;
30 typedef VECTOR (4, float) float4;
32 typedef VECTOR (2, int) int2;
33 typedef VECTOR (2, long long) longlong2;
34 typedef VECTOR (2, float) float2;
35 typedef VECTOR (2, double) double2;
[all …]
/netbsd/src/sys/arch/next68k/stand/boot/
Dsrt0.s106 VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); \
107 VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); \
108 VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); \
109 VECTOR(astrap); VECTOR(astrap); VECTOR(astrap); VECTOR(astrap);
/netbsd/src/external/gpl3/gdb/dist/gdb/
Damdgpu-tdep.c129 VECTOR, enumerator
195 : amd_dbgapi_register_type (kind::VECTOR, in amd_dbgapi_register_type_vector()
544 == amd_dbgapi_register_type::kind::VECTOR); in parse_amd_dbgapi_register_type()
697 case amd_dbgapi_register_type::kind::VECTOR: in amd_dbgapi_register_type_to_gdb_type()
1356 gdb_assert (type.kind () == amd_dbgapi_register_type::kind::VECTOR); in amdgpu_register_type_parse_test()
/netbsd/src/external/gpl3/gdb/dist/libiberty/testsuite/
Dtest-pexecute.c227 #define TEST_PEX_GET_STATUS(PEXOBJ, COUNT, VECTOR) \ in main() argument
230 if (!pex_get_status (PEXOBJ, COUNT, VECTOR)) \ in main()
/netbsd/src/sys/arch/m68k/include/
Dasm.h230 #define VECTOR(x) \ macro
/netbsd/src/sys/arch/alpha/include/
Dasm.h470 #define VECTOR(_name_, _i_mask_) \ macro
/netbsd/src/usr.bin/config/
Dgram.y189 %token VECTOR VERSION
525 | VECTOR '=' devnode_dims { $$ = nvcat(new_s("DEVNODE_VECTOR"), $3); }
Dscan.l188 vector return VECTOR;
/netbsd/src/sys/arch/mips/mips/
DmipsX_subr.S379 VECTOR(MIPSX(tlb_miss), unknown)
413 VECTOR(MIPSX(xtlb_miss), unknown)
420 VECTOR(MIPSX(tlb_miss), unknown)
541 VECTOR(MIPSX(xtlb_miss), unknown)
588 VECTOR(MIPSX(cache), unknown)
612 VECTOR(MIPSX(exception), unknown)
655 VECTOR(MIPSX(intr), unknown)
Dlocore_mips1.S95 VECTOR(MIPSX(utlb_miss), unknown)
138 VECTOR(MIPSX(exception), unknown)
/netbsd/src/sys/arch/mips/include/
Dasm.h316 #define VECTOR(x, regmask) \ macro
/netbsd/src/sys/dev/microcode/aic7xxx/
Daic7xxx_reg.h1417 #define VECTOR 0x0f macro
Daic7xxx.reg1540 mask VECTOR 0x0f
/netbsd/src/external/gpl3/binutils/dist/gas/doc/
Dc-riscv.texi820 and it provides AMO instructions for the T-Head VECTOR vendor extension.
/netbsd/src/external/gpl3/binutils/dist/cpu/
Dor1korbis.cpu160 ("VECTOR" #x0a)
/netbsd/src/external/gpl3/gdb/dist/cpu/
Dor1korbis.cpu160 ("VECTOR" #x0a)
/netbsd/src/external/gpl3/gcc/dist/gcc/doc/
Dgcc.info51881 can use VECTOR LONG instead of VECTOR LONG LONG, VECTOR BOOL LONG
51882 instead of VECTOR BOOL LONG LONG, and VECTOR UNSIGNED LONG instead of
51883 VECTOR UNSIGNED LONG LONG.
51996 available for 64-bit targets. New vector types (VECTOR __INT128 and
51997 VECTOR __UINT128) are available to hold the __INT128 and __UINT128 types
52000 The normal vector extract, and set operations work on VECTOR __INT128
52001 and VECTOR __UINT128 types, but the index value must be 0.
/netbsd/src/external/gpl3/gcc/dist/gcc/
DChangeLog16430 * config/riscv/riscv.opt (Mask(VECTOR)): New.
/netbsd/src/external/gpl3/binutils/dist/
DChangeLog.git12864 RISC-V: Add vector permutation instructions for T-Head VECTOR vendor extension
12894 RISC-V: Add vector mask instructions for T-Head VECTOR vendor extension
12924 RISC-V: Add reductions instructions for T-Head VECTOR vendor extension
12950 RISC-V: Add floating-point arithmetic instructions for T-Head VECTOR vendor extension
12981 RISC-V: Add fixed-point arithmetic instructions for T-Head VECTOR vendor extension
13012 RISC-V: Add integer arithmetic instructions for T-Head VECTOR vendor extension
13043 RISC-V: Add sub-extension XTheadZvamo for T-Head VECTOR vendor extension
13050 for T-Head VECTOR vendor extension. The 'th' prefix and the
13082 RISC-V: Add load/store segment instructions for T-Head VECTOR vendor extension
13087 This patch adds provides load/store segment instructions for T-Head VECTOR
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