WR_2 (reference) in projects: netbsd - OpenGrok search results

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Searched refs:WR_2 (Results 1 – 8 of 8) sorted by relevance

/netbsd/src/external/gpl3/binutils/dist/opcodes/
D	mips16-opc.c	`166 #define WR_2 INSN_WRITE_2 macro 172 #define MOD_2 (WR_2\|RD_2)`
D	mips-opc.c	233 #define WR_2 INSN_WRITE_2 macro 240 #define MOD_2 (WR_2\|RD_2) 526 {"gslq", "+z,t,+c(b)", 0xc8000020, 0xfc008020, WR_1\|WR_2\|RD_4\|LM, 0, … 528 {"gslqc1", "+Z,T,+c(b)", 0xc8008020, 0xfc008020, WR_1\|WR_2\|RD_4\|LM, … 1117 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, RD_1\|WR_2\|CM\|FP_D, 0, … 1118 {"dmtc1", "t,G", 0x44a00000, 0xffe007ff, RD_1\|WR_2\|CM\|FP_D, 0, … 1309 {"lldp", "t,d,s", 0x7c000077, 0xfc0007ff, WR_1\|WR_2\|RD_3\|LM, 0, … 1311 {"llwp", "t,d,s", 0x7c000076, 0xfc0007ff, WR_1\|WR_2\|RD_3\|LM, 0, … 1533 {"mtc1", "t,S", 0x44800000, 0xffe007ff, RD_1\|WR_2\|CM\|FP_S, 0, … 1534 {"mtc1", "t,G", 0x44800000, 0xffe007ff, RD_1\|WR_2\|CM\|FP_S, 0, … [all …]
D	micromips-opc.c	`212 #define WR_2 INSN_WRITE_2 macro 218 #define MOD_2 (WR_2\|RD_2) 637 {"dmtc1", "t,S", 0x54002c3b, 0xfc00ffff, RD_1\|WR_2\|FP_S\|CM, 0, … 638 {"dmtc1", "t,G", 0x54002c3b, 0xfc00ffff, RD_1\|WR_2\|FP_S\|CM, 0, … 888 {"mtc1", "t,S", 0x5400283b, 0xfc00ffff, RD_1\|WR_2\|FP_S\|CM, 0, … 889 {"mtc1", "t,G", 0x5400283b, 0xfc00ffff, RD_1\|WR_2\|FP_S\|CM, 0, … 897 {"mthc1", "t,S", 0x5400383b, 0xfc00ffff, RD_1\|WR_2\|FP_D\|CM, 0, … 898 {"mthc1", "t,G", 0x5400383b, 0xfc00ffff, RD_1\|WR_2\|FP_D\|CM, 0, …`
D	ChangeLog-2013	`342 * mips-opc.c (WR_1, WR_2, RD_1, RD_2, RD_3, RD_4, MOD_1, MOD_2, UDI): 348 * mips16-opc.c (WR_1, WR_2, RD_1, RD_2, RD_3, RD_4, MOD_1, MOD_2): 358 * micromips-opc.c (WR_1, WR_2, RD_1, RD_2, RD_3, RD_4, MOD_1, MOD_2):`
/netbsd/src/external/gpl3/gdb/dist/opcodes/
D	mips16-opc.c	`166 #define WR_2 INSN_WRITE_2 macro 172 #define MOD_2 (WR_2\|RD_2)`
D	mips-opc.c	233 #define WR_2 INSN_WRITE_2 macro 240 #define MOD_2 (WR_2\|RD_2) 526 {"gslq", "+z,t,+c(b)", 0xc8000020, 0xfc008020, WR_1\|WR_2\|RD_4\|LM, 0, … 528 {"gslqc1", "+Z,T,+c(b)", 0xc8008020, 0xfc008020, WR_1\|WR_2\|RD_4\|LM, … 1117 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, RD_1\|WR_2\|CM\|FP_D, 0, … 1118 {"dmtc1", "t,G", 0x44a00000, 0xffe007ff, RD_1\|WR_2\|CM\|FP_D, 0, … 1309 {"lldp", "t,d,s", 0x7c000077, 0xfc0007ff, WR_1\|WR_2\|RD_3\|LM, 0, … 1311 {"llwp", "t,d,s", 0x7c000076, 0xfc0007ff, WR_1\|WR_2\|RD_3\|LM, 0, … 1533 {"mtc1", "t,S", 0x44800000, 0xffe007ff, RD_1\|WR_2\|CM\|FP_S, 0, … 1534 {"mtc1", "t,G", 0x44800000, 0xffe007ff, RD_1\|WR_2\|CM\|FP_S, 0, … [all …]
D	micromips-opc.c	`212 #define WR_2 INSN_WRITE_2 macro 218 #define MOD_2 (WR_2\|RD_2) 637 {"dmtc1", "t,S", 0x54002c3b, 0xfc00ffff, RD_1\|WR_2\|FP_S\|CM, 0, … 638 {"dmtc1", "t,G", 0x54002c3b, 0xfc00ffff, RD_1\|WR_2\|FP_S\|CM, 0, … 888 {"mtc1", "t,S", 0x5400283b, 0xfc00ffff, RD_1\|WR_2\|FP_S\|CM, 0, … 889 {"mtc1", "t,G", 0x5400283b, 0xfc00ffff, RD_1\|WR_2\|FP_S\|CM, 0, … 897 {"mthc1", "t,S", 0x5400383b, 0xfc00ffff, RD_1\|WR_2\|FP_D\|CM, 0, … 898 {"mthc1", "t,G", 0x5400383b, 0xfc00ffff, RD_1\|WR_2\|FP_D\|CM, 0, …`
D	ChangeLog-2013	`342 * mips-opc.c (WR_1, WR_2, RD_1, RD_2, RD_3, RD_4, MOD_1, MOD_2, UDI): 348 * mips16-opc.c (WR_1, WR_2, RD_1, RD_2, RD_3, RD_4, MOD_1, MOD_2): 358 * micromips-opc.c (WR_1, WR_2, RD_1, RD_2, RD_3, RD_4, MOD_1, MOD_2):`

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