Searched refs:_LS64_INSN (Results 1 – 4 of 4) sorted by relevance
| /netbsd/src/external/gpl3/binutils/dist/opcodes/ |
| D | aarch64-tbl.h | 2865 #define _LS64_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \ macro
4008 …_LS64_INSN ("ld64b", 0xf83fd000, 0xfffffc00, lse_atomic, OP2 (Rt_LS64, ADDR_SIMPLE), QL_X1NIL, 0…
4009 …_LS64_INSN ("st64b", 0xf83f9000, 0xfffffc00, lse_atomic, OP2 (Rt_LS64, ADDR_SIMPLE), QL_X1NIL, 0…
4010 …_LS64_INSN ("st64bv", 0xf820b000, 0xffe0fc00, lse_atomic, OP3 (Rs, Rt_LS64, ADDR_SIMPLE), QL_X2NI…
4011 …_LS64_INSN ("st64bv0", 0xf820a000, 0xffe0fc00, lse_atomic, OP3 (Rs, Rt_LS64, ADDR_SIMPLE), QL_X2NI…
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| D | ChangeLog-2020 | 77 * aarch64-tbl.h (struct aarch64_opcode): Update _LS64_INSN instructions with
99 (_LS64_INSN): New instruction group macro.
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| /netbsd/src/external/gpl3/gdb/dist/opcodes/ |
| D | aarch64-tbl.h | 2935 #define _LS64_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \ macro
4099 …_LS64_INSN ("ld64b", 0xf83fd000, 0xfffffc00, lse_atomic, OP2 (Rt_LS64, ADDR_SIMPLE), QL_X1NIL, 0…
4100 …_LS64_INSN ("st64b", 0xf83f9000, 0xfffffc00, lse_atomic, OP2 (Rt_LS64, ADDR_SIMPLE), QL_X1NIL, 0…
4101 …_LS64_INSN ("st64bv", 0xf820b000, 0xffe0fc00, lse_atomic, OP3 (Rs, Rt_LS64, ADDR_SIMPLE), QL_X2NI…
4102 …_LS64_INSN ("st64bv0", 0xf820a000, 0xffe0fc00, lse_atomic, OP3 (Rs, Rt_LS64, ADDR_SIMPLE), QL_X2NI…
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| D | ChangeLog-2020 | 77 * aarch64-tbl.h (struct aarch64_opcode): Update _LS64_INSN instructions with
99 (_LS64_INSN): New instruction group macro.
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