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Searched refs:aarch64_opcode_table (Results 1 – 25 of 36) sorted by relevance

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/netbsd/src/external/gpl3/binutils/dist/opcodes/
Daarch64-gen.c88 {aarch64_opcode_table};
477 (unsigned int)(curr - aarch64_opcode_table)); in print_find_next_opcode_1()
704 ent = aarch64_opcode_table; in find_alias_opcode()
775 node->index = alias - aarch64_opcode_table; in find_alias_opcode()
799 ent = aarch64_opcode_table; in create_alias_info()
820 for (i = 0, ent = aarch64_opcode_table; i < num; ++i, ++ent) in create_alias_info()
826 node->index = ent - aarch64_opcode_table; in create_alias_info()
1106 opcode = aarch64_opcode_table; in print_get_opcode()
1117 aarch64_opcode_table[op_enum_table[opcode->op]].name, in print_get_opcode()
1123 op_enum_table[opcode->op] = opcode - aarch64_opcode_table; in print_get_opcode()
DChangeLog-201539 (aarch64_opcode_table): Add fp16 versions of scvtf, fcvtzs, ucvtf
48 (aarch64_opcode_table): Add fp16 versions of scvtf, fcvtzs, ucvtf
57 (aarch64_opcode_table): Add fp16 versions of fmaxnmp, faddp,
72 (aarch64_opcode_table): Add fp16 version of fmov to the Adv.SIMD
81 (aarch64_opcode_table): Add fp16 versions of fmaxnmv, fmaxv,
89 * aarch64-tbl.h (aarch64_opcode_table): Add fp16 versions of fmla,
98 (aarch64_opcode_table): Add fp16 versions of fmla, fmls, fmul and
108 (aarch64_opcode_table): Add fp16 versions of fcvtns, fcvtms,
119 (aarch64_opcode_table): Add fp16 versions of frintn, frintm,
130 * aarch64-tbl.h (aarch64_opcode_table): Add fp16 versions of
[all …]
Daarch64-asm-2.c29 int key = opcode - aarch64_opcode_table; in aarch64_find_real_opcode()
613 return aarch64_opcode_table + value; in aarch64_find_real_opcode()
DChangeLog-201843 * aarch64-tbl.h (aarch64_opcode_table): Only disassemble an ORR
91 * aarch64-tbl.h (aarch64_opcode_table): Add stgv and ldgv.
100 (aarch64_opcode_table): Add ldg.
113 (aarch64_opcode_table): Add stg, stzg, st2g, stz2g and stgp
122 * aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and cmpp.
136 (aarch64_opcode_table): Add addg, subg, irg and gmi.
295 (aarch64_opcode_table): Add entry for BTI.
322 (aarch64_opcode_table): Add entries for cfp, dvp and cpp.
332 (aarch64_opcode_table): Add entry for sb.
342 (aarch64_opcode_table): Add entries for xaflag, axflag
[all …]
Daarch64-dis-2.c32129 return aarch64_opcode_table + aarch64_opcode_lookup_1 (word); in aarch64_opcode_lookup()
32136 int key = opcode - aarch64_opcode_table; in aarch64_find_next_opcode()
32489 return aarch64_opcode_table + value; in aarch64_find_next_opcode()
32496 int key = opcode - aarch64_opcode_table; in aarch64_find_alias_opcode()
32634 return aarch64_opcode_table + value; in aarch64_find_alias_opcode()
32641 int key = opcode - aarch64_opcode_table; in aarch64_find_next_alias_opcode()
32832 return aarch64_opcode_table + value; in aarch64_find_next_alias_opcode()
DChangeLog-2014257 * aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr.
265 (aarch64_opcode_table): New LSE instructions added. Improve
267 (aarch64_opcode_table): Describe PAIRREG.
805 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
DChangeLog-2016207 (aarch64_opcode_table): Change CRn, CRm operand class and type.
382 (aarch64_opcode_table): Add fcmla and fcadd.
843 (aarch64_opcode_table): Add SVE instructions.
1075 (V8_2_INSN, aarch64_opcode_table): Initialize tied_operand field.
1211 (aarch64_opcode_table): Use it.
1215 * aarch64-tbl.h (aarch64_opcode_table): Make more use of
1221 (aarch64_opcode_table): Update uses accordingly.
2024 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
DChangeLog-2013130 * aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of
1151 (aarch64_opcode_table): Add entries for the crc32b, crc32h, crc32w,
1233 * aarch64-tbl.h (aarch64_opcode_table): Flag sshll, sshll2, ushll and
1260 (aarch64_opcode_table): Remove the OP enumerator from the asimdimm
1331 * aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag
DChangeLog-2019519 * aarch64-tbl.h (aarch64_opcode_table): Switch SVE2's
614 (aarch64_opcode_table): Add data gathering hint mnemonic.
637 (aarch64_opcode_table): Support for SVE_ADDR_RI_S4x32.
638 (aarch64_opcode_table): Define new instructions smmla,
692 (aarch64_opcode_table): Define new instructions bfdot,
1150 * aarch64-tbl.h (aarch64_opcode_table): Add C_MAX_ELEM flags
1914 (aarch64_opcode_table): Add sve2 instructions.
2343 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
DChangeLog-2017393 (aarch64_opcode_table): Add Va, MASK, IMM_2, ADDR_OFFSET, SM3_IMM2.
1431 * aarch64-tbl.h (aarch64_opcode_table): Fix masks for LD1R, LD2R,
1715 (aarch64_opcode_table): Add new SVE instructions.
1716 (aarch64_opcode_table): Use imm_rotate{1,2} instead of imm_rotate
1758 (aarch64_opcode_table): Use it for the complex number instructions.
1913 (aarch64_opcode_table): Use RCPC_INSN.
DChangeLog372 * aarch64-gen.c (aarch64_opcode_table): Add const.
373 * aarch64-tbl.h (aarch64_opcode_table): Likewise.
595 * aarch64-tbl.h (struct aarch64_opcode aarch64_opcode_table): Reclassify
1389 (aarch64_opcode_table): Delete csr.
DChangeLog-2020542 (aarch64_opcode_table): Add dfb.
2401 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
2439 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
2451 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
3240 * aarch64-tbl.h (aarch64_opcode_table): Use
3245 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
3250 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
3256 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
Daarch64-opc-2.c428 return aarch64_opcode_table + op_enum_table[op]; in aarch64_get_opcode()
/netbsd/src/external/gpl3/gdb/dist/opcodes/
Daarch64-gen.c88 {aarch64_opcode_table};
514 (unsigned int)(curr - aarch64_opcode_table)); in print_find_next_opcode_1()
741 ent = aarch64_opcode_table; in find_alias_opcode()
812 node->index = alias - aarch64_opcode_table; in find_alias_opcode()
836 ent = aarch64_opcode_table; in create_alias_info()
857 for (i = 0, ent = aarch64_opcode_table; i < num; ++i, ++ent) in create_alias_info()
863 node->index = ent - aarch64_opcode_table; in create_alias_info()
1143 opcode = aarch64_opcode_table; in print_get_opcode()
1154 aarch64_opcode_table[op_enum_table[opcode->op]].name, in print_get_opcode()
1160 op_enum_table[opcode->op] = opcode - aarch64_opcode_table; in print_get_opcode()
DChangeLog-201539 (aarch64_opcode_table): Add fp16 versions of scvtf, fcvtzs, ucvtf
48 (aarch64_opcode_table): Add fp16 versions of scvtf, fcvtzs, ucvtf
57 (aarch64_opcode_table): Add fp16 versions of fmaxnmp, faddp,
72 (aarch64_opcode_table): Add fp16 version of fmov to the Adv.SIMD
81 (aarch64_opcode_table): Add fp16 versions of fmaxnmv, fmaxv,
89 * aarch64-tbl.h (aarch64_opcode_table): Add fp16 versions of fmla,
98 (aarch64_opcode_table): Add fp16 versions of fmla, fmls, fmul and
108 (aarch64_opcode_table): Add fp16 versions of fcvtns, fcvtms,
119 (aarch64_opcode_table): Add fp16 versions of frintn, frintm,
130 * aarch64-tbl.h (aarch64_opcode_table): Add fp16 versions of
[all …]
Daarch64-asm-2.c29 int key = opcode - aarch64_opcode_table; in aarch64_find_real_opcode()
613 return aarch64_opcode_table + value; in aarch64_find_real_opcode()
DChangeLog-201843 * aarch64-tbl.h (aarch64_opcode_table): Only disassemble an ORR
91 * aarch64-tbl.h (aarch64_opcode_table): Add stgv and ldgv.
100 (aarch64_opcode_table): Add ldg.
113 (aarch64_opcode_table): Add stg, stzg, st2g, stz2g and stgp
122 * aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and cmpp.
136 (aarch64_opcode_table): Add addg, subg, irg and gmi.
295 (aarch64_opcode_table): Add entry for BTI.
322 (aarch64_opcode_table): Add entries for cfp, dvp and cpp.
332 (aarch64_opcode_table): Add entry for sb.
342 (aarch64_opcode_table): Add entries for xaflag, axflag
[all …]
Daarch64-dis-2.c32811 return aarch64_opcode_table + aarch64_opcode_lookup_1 (word); in aarch64_opcode_lookup()
32818 int key = opcode - aarch64_opcode_table; in aarch64_find_next_opcode()
33169 return aarch64_opcode_table + value; in aarch64_find_next_opcode()
33176 int key = opcode - aarch64_opcode_table; in aarch64_find_alias_opcode()
33314 return aarch64_opcode_table + value; in aarch64_find_alias_opcode()
33321 int key = opcode - aarch64_opcode_table; in aarch64_find_next_alias_opcode()
33512 return aarch64_opcode_table + value; in aarch64_find_next_alias_opcode()
DChangeLog-2014257 * aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr.
265 (aarch64_opcode_table): New LSE instructions added. Improve
267 (aarch64_opcode_table): Describe PAIRREG.
805 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
DChangeLog-2016207 (aarch64_opcode_table): Change CRn, CRm operand class and type.
382 (aarch64_opcode_table): Add fcmla and fcadd.
843 (aarch64_opcode_table): Add SVE instructions.
1075 (V8_2_INSN, aarch64_opcode_table): Initialize tied_operand field.
1211 (aarch64_opcode_table): Use it.
1215 * aarch64-tbl.h (aarch64_opcode_table): Make more use of
1221 (aarch64_opcode_table): Update uses accordingly.
2024 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
DChangeLog-2013130 * aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of
1151 (aarch64_opcode_table): Add entries for the crc32b, crc32h, crc32w,
1233 * aarch64-tbl.h (aarch64_opcode_table): Flag sshll, sshll2, ushll and
1260 (aarch64_opcode_table): Remove the OP enumerator from the asimdimm
1331 * aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag
DChangeLog-2019519 * aarch64-tbl.h (aarch64_opcode_table): Switch SVE2's
614 (aarch64_opcode_table): Add data gathering hint mnemonic.
637 (aarch64_opcode_table): Support for SVE_ADDR_RI_S4x32.
638 (aarch64_opcode_table): Define new instructions smmla,
692 (aarch64_opcode_table): Define new instructions bfdot,
1150 * aarch64-tbl.h (aarch64_opcode_table): Add C_MAX_ELEM flags
1914 (aarch64_opcode_table): Add sve2 instructions.
2343 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
DChangeLog-2017393 (aarch64_opcode_table): Add Va, MASK, IMM_2, ADDR_OFFSET, SM3_IMM2.
1431 * aarch64-tbl.h (aarch64_opcode_table): Fix masks for LD1R, LD2R,
1715 (aarch64_opcode_table): Add new SVE instructions.
1716 (aarch64_opcode_table): Use imm_rotate{1,2} instead of imm_rotate
1758 (aarch64_opcode_table): Use it for the complex number instructions.
1913 (aarch64_opcode_table): Use RCPC_INSN.
DChangeLog386 * aarch64-gen.c (aarch64_opcode_table): Add const.
387 * aarch64-tbl.h (aarch64_opcode_table): Likewise.
609 * aarch64-tbl.h (struct aarch64_opcode aarch64_opcode_table): Reclassify
1403 (aarch64_opcode_table): Delete csr.
DChangeLog-2020542 (aarch64_opcode_table): Add dfb.
2401 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
2439 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
2451 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
3240 * aarch64-tbl.h (aarch64_opcode_table): Use
3245 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
3250 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
3256 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit

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