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Searched refs:alu (Results 1 – 25 of 75) sorted by relevance

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/netbsd/src/external/gpl3/gcc/dist/gcc/config/mips/
Dgeneric.md27 "alu")
31 "alu")
35 "alu")
39 "alu")
43 "alu")
59 "alu")
63 "alu")
67 "alu")
71 "alu")
76 "alu")
[all …]
D4600.md81 "alu")
86 "alu")
92 "alu")
99 "alu")
105 "alu")
112 "alu")
118 "alu")
124 "alu")
130 "alu")
D3000.md27 "alu")
42 "alu")
47 "alu")
53 "alu")
59 "alu")
65 "alu")
71 "alu")
D6000.md27 "alu")
32 "alu")
38 "alu")
44 "alu")
50 "alu")
56 "alu")
D5000.md27 "alu")
56 "alu")
62 "alu")
68 "alu")
74 "alu")
80 "alu")
Dsb1.md23 ;; pipes (one of which can support some ALU operations), 2 alu pipes, 2 FP
30 ;; simple alu operations issue to ls1 if it is still available, and their
221 ;; On SB-1, simple alu instructions can execute on the LS1 unit.
223 ;; ??? A simple alu insn issued on an LS unit has 0 cycle latency to an EX
225 ;; another LS insn (excluding store data). A simple alu insn issued on an EX
229 ;; ??? We cannot handle latencies properly for simple alu instructions
244 ;; alu instructions that are not supposed to be scheduled to LS1 don't
255 ;; On SB-1A, simple alu instructions cannot execute on the LS1 unit, and we
278 ;; An alu insn issued on an EX unit has a latency of 5 cycles when the
D4130.md71 (define_attr "vr4130_class" "mul,mem,alu"
77 (const_string "alu")))
/netbsd/src/external/gpl3/gdb/dist/sim/rl78/
Dmem.c173 unsigned long alu, ahu; in mem_put_byte() local
181 alu = mem_get_hi (MDAL); in mem_put_byte()
183 rvu = alu * ahu; in mem_put_byte()
184 tprintf ("MDUC: %lu * %lu = %lu\n", alu, ahu, rvu); in mem_put_byte()
197 alu = mem_get_hi (MDAL); in mem_put_byte()
199 rvu = alu * ahu; in mem_put_byte()
203 tprintf ("MDUC: %lu * %lu + %lu = ", alu, ahu, mdc); in mem_put_byte()
/netbsd/src/sys/arch/hp300/stand/common/
Dmaskbits.h98 #define DoRop(result, alu, src, dst) \ argument
100 if (alu == RR_COPY) \
103 switch (alu) { \
/netbsd/src/external/gpl3/gcc/dist/gcc/config/arm/
Daarch-common-protos.h134 const int alu; member
143 const struct alu_cost_table alu; member
Darm1136jfs.md70 ;; after the alu stage has finished.
339 ;; A store can start immediately after an alu op, if that alu op does
348 ;; An alu op can start sooner after a load, if that alu op does not
Dcortex-m7.md37 ;; Simple alu instruction without inline shift operation.
54 ;; Simple alu with inline shift operation.
Darm.cc10108 *cost += extra_cost->alu.arith_shift_reg; \
10113 *cost += extra_cost->alu.arith_shift; \
10355 *cost += 2 * extra_cost->alu.logical in arm_rtx_costs_internal()
10356 + extra_cost->alu.arith; in arm_rtx_costs_internal()
10373 *cost += extra_cost->alu.shift_reg; in arm_rtx_costs_internal()
10386 *cost += 2 * extra_cost->alu.shift; in arm_rtx_costs_internal()
10397 *cost += (speed_p ? extra_cost->alu.shift_reg : 1 in arm_rtx_costs_internal()
10410 *cost += (speed_p ? extra_cost->alu.shift_reg : 1 in arm_rtx_costs_internal()
10419 *cost += extra_cost->alu.bfx; in arm_rtx_costs_internal()
10429 *cost += 2 * extra_cost->alu.shift; in arm_rtx_costs_internal()
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/i386/
Dgeode.md34 ;; alu describes the Integer unit
46 (define_insn_reservation "alu" 1
48 … (eq_attr "type" "alu,alu1,negnot,icmp,lea,test,imov,imovx,icmov,incdec,setcc"))
Dbtver2.md71 (define_reservation "btver2-alu" "(btver2-ieu0|btver2-ieu1)")
110 "btver2-direct,btver2-load,btver2-alu")
115 "btver2-direct,btver2-alu")
121 "btver2-direct,btver2-load,btver2-alu")
126 "btver2-direct,btver2-alu")
131 "btver2-double,btver2-alu")
136 "btver2-direct,btver2-alu")
231 "btver2-direct,btver2-load,btver2-alu")
238 "btver2-direct,btver2-load,btver2-alu")
244 "btver2-direct,btver2-alu,btver2-store")
[all …]
Dglm.md89 ;; Normal alu insns without carry
92 (and (eq_attr "type" "alu")
97 ;; Normal alu insns without carry, but use MEC.
100 (and (eq_attr "type" "alu")
107 (and (eq_attr "type" "alu")
116 (and (eq_attr "type" "alu")
124 (and (eq_attr "type" "alu")
Dslm.md97 ;; Normal alu insns without carry
100 (and (eq_attr "type" "alu")
105 ;; Normal alu insns without carry, but use MEC.
108 (and (eq_attr "type" "alu")
116 (and (eq_attr "type" "alu")
124 (and (eq_attr "type" "alu")
Dk6.md131 … (and (eq_attr "type" "alu,alu1,negnot,icmp,test,imovx,incdec,setcc")
137 … (and (eq_attr "type" "alu,alu1,negnot,icmp,test,imovx,incdec,setcc")
143 … (and (eq_attr "type" "alu,alu1,negnot,icmp,test,imovx,incdec,setcc")
Datom.md105 ;; Normal alu insns without carry
108 (and (eq_attr "type" "alu")
113 ;; Normal alu insns without carry
116 (and (eq_attr "type" "alu")
124 (and (eq_attr "type" "alu")
132 (and (eq_attr "type" "alu")
/netbsd/src/external/gpl3/binutils/dist/cpu/
Dor1korbis.cpu45 (dnf f-op-9-2 "op-9-2" ((MACH ORBIS-MACHS)) 9 2) ;; alu ops upper opcode
48 (dnf f-op-7-2 "op-7-2" ((MACH ORBIS-MACHS)) 7 2) ;; alu lower upper opc,shr…
259 (define-normal-insn-enum insn-opcode-alu-regreg
260 "alu reg/reg insn opcode enums" ((MACH ORBIS-MACHS))
765 (define-pmacro (alu-insn mnemonic)
778 (alu-insn and)
779 (alu-insn or)
780 (alu-insn xor)
782 (define-pmacro (alu-carry-insn mnemonic)
803 (alu-carry-insn add)
[all …]
/netbsd/src/external/gpl3/gdb/dist/cpu/
Dor1korbis.cpu45 (dnf f-op-9-2 "op-9-2" ((MACH ORBIS-MACHS)) 9 2) ;; alu ops upper opcode
48 (dnf f-op-7-2 "op-7-2" ((MACH ORBIS-MACHS)) 7 2) ;; alu lower upper opc,shr…
259 (define-normal-insn-enum insn-opcode-alu-regreg
260 "alu reg/reg insn opcode enums" ((MACH ORBIS-MACHS))
765 (define-pmacro (alu-insn mnemonic)
778 (alu-insn and)
779 (alu-insn or)
780 (alu-insn xor)
782 (define-pmacro (alu-carry-insn mnemonic)
803 (alu-carry-insn add)
[all …]
DChangeLog64 * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD.
65 (define-alu-insn-bin, daib): Take ISAs as an argument.
66 (define-alu-instructions): Update calls to daib pmacro with
71 * bpf.cpu (define-alu-instructions): Correct semantic operators
91 (define-alu-insn-un): Use new endian-isas pmacro.
92 (define-alu-insn-bin, define-alu-insn-mov): Likewise.
124 * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
125 (define-alu-insn-mov): Likewise.
127 (define-alu-instructions): Likewise.
197 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
[all …]
/netbsd/src/external/gpl3/gdb/dist/sim/testsuite/common/
Dlocal.mk27 %D%/alu-tst
39 %D%/alu-tst$(EXEEXT): $(%C%_alu_tst_OBJECTS) $(%C%_alu_tst_DEPENDENCIES) %D%/$(am__dirstamp)
/netbsd/src/external/gpl3/binutils/dist/gas/
DChangeLog31 * testsuite/gas/bpf/alu-pseudoc.s: Adapt test accordingly.
98 * testsuite/gas/bpf/alu-pseudoc.s: Add test to make sure C-like
100 * testsuite/gas/bpf/alu-pseudoc.d: Update expected results.
101 * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
205 * testsuite/gas/bpf/alu.s: Add test for NEGI and NEG32I.
207 * testsuite/gas/bpf/alu-pseudoc.s: Likewise.
209 * testsuite/gas/bpf/alu.d: Add expected results.
210 * testsuite/gas/bpf/alu-be.d: Likewise.
211 * testsuite/gas/bpf/alu-pseudoc.d: Likewise.
212 * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/rs6000/
Dpower9.md263 (define_insn_reservation "power9-alu" 2
268 (define_bypass 5 "power9-alu"
279 (define_insn_reservation "power9-cracked-alu" 2
285 (define_bypass 7 "power9-cracked-alu"

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