1 /* $NetBSD: elink3.c,v 1.154 2024/07/05 04:31:51 rin Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan@NetBSD.org>
35 * Copyright (c) 1994 Herb Peyerl <hpeyerl@beer.org>
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 * 3. All advertising materials mentioning features or use of this software
47 * must display the following acknowledgement:
48 * This product includes software developed by Herb Peyerl.
49 * 4. The name of Herb Peyerl may not be used to endorse or promote products
50 * derived from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 */
63
64 #include <sys/cdefs.h>
65 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.154 2024/07/05 04:31:51 rin Exp $");
66
67 #include "opt_inet.h"
68
69 #include <sys/param.h>
70 #include <sys/systm.h>
71 #include <sys/callout.h>
72 #include <sys/kernel.h>
73 #include <sys/mbuf.h>
74 #include <sys/socket.h>
75 #include <sys/ioctl.h>
76 #include <sys/errno.h>
77 #include <sys/syslog.h>
78 #include <sys/select.h>
79 #include <sys/device.h>
80 #include <sys/rndsource.h>
81
82 #include <net/if.h>
83 #include <net/if_dl.h>
84 #include <net/if_ether.h>
85 #include <net/if_media.h>
86 #include <net/bpf.h>
87
88 #include <sys/cpu.h>
89 #include <sys/bus.h>
90 #include <sys/intr.h>
91
92 #include <dev/mii/mii.h>
93 #include <dev/mii/miivar.h>
94 #include <dev/mii/mii_bitbang.h>
95
96 #include <dev/ic/elink3var.h>
97 #include <dev/ic/elink3reg.h>
98
99 #ifdef DEBUG
100 int epdebug = 0;
101 #endif
102
103 /*
104 * XXX endian workaround for big-endian CPUs with pcmcia:
105 * if stream methods for bus_space_multi are not provided, define them
106 * using non-stream bus_space_{read,write}_multi_.
107 * Assumes host CPU is same endian-ness as bus.
108 */
109 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
110 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
111 #define bus_space_read_multi_stream_4 bus_space_read_multi_4
112 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
113 #define bus_space_write_multi_stream_4 bus_space_write_multi_4
114 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
115
116 /*
117 * Structure to map media-present bits in boards to ifmedia codes and
118 * printable media names. Used for table-driven ifmedia initialization.
119 */
120 struct ep_media {
121 int epm_mpbit; /* media present bit */
122 const char *epm_name; /* name of medium */
123 int epm_ifmedia; /* ifmedia word for medium */
124 int epm_epmedia; /* ELINKMEDIA_* constant */
125 };
126
127 /*
128 * Media table for the Demon/Vortex/Boomerang chipsets.
129 *
130 * Note that MII on the Demon and Vortex (3c59x) indicates an external
131 * MII connector (for connecting an external PHY) ... I think. Treat
132 * it as `manual' on these chips.
133 *
134 * Any Boomerang (3c90x) chips with MII really do have an internal
135 * MII and real PHYs attached; no `native' media.
136 */
137 const struct ep_media ep_vortex_media[] = {
138 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER | IFM_10_T,
139 ELINKMEDIA_10BASE_T },
140 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER | IFM_10_T | IFM_FDX,
141 ELINKMEDIA_10BASE_T },
142 { ELINK_PCI_AUI, "10base5", IFM_ETHER | IFM_10_5,
143 ELINKMEDIA_AUI },
144 { ELINK_PCI_BNC, "10base2", IFM_ETHER | IFM_10_2,
145 ELINKMEDIA_10BASE_2 },
146 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER | IFM_100_TX,
147 ELINKMEDIA_100BASE_TX },
148 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER | IFM_100_TX|IFM_FDX,
149 ELINKMEDIA_100BASE_TX },
150 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER | IFM_100_FX,
151 ELINKMEDIA_100BASE_FX },
152 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER | IFM_MANUAL,
153 ELINKMEDIA_MII },
154 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER | IFM_100_T4,
155 ELINKMEDIA_100BASE_T4 },
156 { 0, NULL, 0,
157 0 },
158 };
159
160 /*
161 * Media table for the older 3Com Etherlink III chipset, used
162 * in the 3c509, 3c579, and 3c589.
163 */
164 const struct ep_media ep_509_media[] = {
165 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER | IFM_10_T,
166 ELINKMEDIA_10BASE_T },
167 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER | IFM_10_5,
168 ELINKMEDIA_AUI },
169 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER | IFM_10_2,
170 ELINKMEDIA_10BASE_2 },
171 { 0, NULL, 0,
172 0 },
173 };
174
175 void ep_internalconfig(struct ep_softc *sc);
176 void ep_vortex_probemedia(struct ep_softc *sc);
177 void ep_509_probemedia(struct ep_softc *sc);
178
179 static void eptxstat(struct ep_softc *);
180 static int epstatus(struct ep_softc *);
181 int epinit(struct ifnet *);
182 void epstop(struct ifnet *, int);
183 int epioctl(struct ifnet *, u_long, void *);
184 void epstart(struct ifnet *);
185 void epwatchdog(struct ifnet *);
186 void epreset(struct ep_softc *);
187 static bool epshutdown(device_t, int);
188 void epread(struct ep_softc *);
189 struct mbuf *epget(struct ep_softc *, int);
190 void epmbuffill(void *);
191 void epmbufempty(struct ep_softc *);
192 void epsetfilter(struct ep_softc *);
193 void ep_roadrunner_mii_enable(struct ep_softc *);
194 void epsetmedia(struct ep_softc *);
195
196 /* ifmedia callbacks */
197 int ep_media_change(struct ifnet *ifp);
198 void ep_media_status(struct ifnet *ifp, struct ifmediareq *req);
199
200 /* MII callbacks */
201 int ep_mii_readreg(device_t, int, int, uint16_t *);
202 int ep_mii_writereg(device_t, int, int, uint16_t);
203 void ep_statchg(struct ifnet *);
204
205 void ep_tick(void *);
206
207 static int epbusyeeprom(struct ep_softc *);
208 u_int16_t ep_read_eeprom(struct ep_softc *, u_int16_t);
209 static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg);
210 static inline void ep_finish_reset(bus_space_tag_t, bus_space_handle_t);
211 static inline void ep_discard_rxtop(bus_space_tag_t, bus_space_handle_t);
212 static inline int ep_w1_reg(struct ep_softc *, int);
213
214 /*
215 * MII bit-bang glue.
216 */
217 u_int32_t ep_mii_bitbang_read(device_t);
218 void ep_mii_bitbang_write(device_t, u_int32_t);
219
220 const struct mii_bitbang_ops ep_mii_bitbang_ops = {
221 ep_mii_bitbang_read,
222 ep_mii_bitbang_write,
223 {
224 PHYSMGMT_DATA, /* MII_BIT_MDO */
225 PHYSMGMT_DATA, /* MII_BIT_MDI */
226 PHYSMGMT_CLK, /* MII_BIT_MDC */
227 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */
228 0, /* MII_BIT_DIR_PHY_HOST */
229 }
230 };
231
232 /*
233 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have
234 * Window 1 registers offset!
235 */
236 static inline int
ep_w1_reg(struct ep_softc * sc,int reg)237 ep_w1_reg(struct ep_softc *sc, int reg)
238 {
239
240 switch (sc->ep_chipset) {
241 case ELINK_CHIPSET_CORKSCREW:
242 return (reg + 0x10);
243
244 case ELINK_CHIPSET_ROADRUNNER:
245 switch (reg) {
246 case ELINK_W1_FREE_TX:
247 case ELINK_W1_RUNNER_RDCTL:
248 case ELINK_W1_RUNNER_WRCTL:
249 return (reg);
250 }
251 return (reg + 0x10);
252 }
253
254 return (reg);
255 }
256
257 /*
258 * Wait for any pending reset to complete.
259 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS,
260 * but older hardware doesn't implement it and we must delay.
261 */
262 static inline void
ep_finish_reset(bus_space_tag_t iot,bus_space_handle_t ioh)263 ep_finish_reset(bus_space_tag_t iot, bus_space_handle_t ioh)
264 {
265 int i;
266
267 for (i = 0; i < 10000; i++) {
268 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) &
269 COMMAND_IN_PROGRESS) == 0)
270 break;
271 DELAY(10);
272 }
273 }
274
275 /*
276 * Issue a (reset) command, and be sure it has completed.
277 * Used for global reset, TX_RESET, RX_RESET.
278 */
279 static inline void
ep_reset_cmd(struct ep_softc * sc,u_int cmd,u_int arg)280 ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg)
281 {
282 bus_space_tag_t iot = sc->sc_iot;
283 bus_space_handle_t ioh = sc->sc_ioh;
284
285 bus_space_write_2(iot, ioh, cmd, arg);
286 ep_finish_reset(iot, ioh);
287 }
288
289
290 static inline void
ep_discard_rxtop(bus_space_tag_t iot,bus_space_handle_t ioh)291 ep_discard_rxtop(bus_space_tag_t iot, bus_space_handle_t ioh)
292 {
293 int i;
294
295 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK);
296
297 /*
298 * Spin for about 1 msec, to avoid forcing a DELAY() between
299 * every received packet (adding latency and limiting pkt-recv rate).
300 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations
301 * is about right.
302 */
303 for (i = 0; i < 8000; i++) {
304 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) &
305 COMMAND_IN_PROGRESS) == 0)
306 return;
307 }
308
309 /* Didn't complete in a hurry. Do DELAY()s. */
310 ep_finish_reset(iot, ioh);
311 }
312
313 /*
314 * Back-end attach and configure.
315 */
316 int
epconfig(struct ep_softc * sc,u_short chipset,u_int8_t * enaddr)317 epconfig(struct ep_softc *sc, u_short chipset, u_int8_t *enaddr)
318 {
319 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
320 bus_space_tag_t iot = sc->sc_iot;
321 bus_space_handle_t ioh = sc->sc_ioh;
322 struct mii_data *mii = &sc->sc_mii;
323 u_int16_t i;
324 u_int8_t myla[ETHER_ADDR_LEN];
325
326 callout_init(&sc->sc_mii_callout, 0);
327 callout_setfunc(&sc->sc_mii_callout, ep_tick, sc);
328
329 callout_init(&sc->sc_mbuf_callout, 0);
330 callout_setfunc(&sc->sc_mbuf_callout, epmbuffill, sc);
331
332 sc->ep_chipset = chipset;
333
334 /*
335 * We could have been groveling around in other register
336 * windows in the front-end; make sure we're in window 0
337 * to read the EEPROM.
338 */
339 GO_WINDOW(0);
340
341 if (enaddr == NULL) {
342 /*
343 * Read the station address from the eeprom.
344 */
345 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) {
346 u_int16_t x = ep_read_eeprom(sc, i);
347 myla[(i << 1)] = x >> 8;
348 myla[(i << 1) + 1] = x;
349 }
350 enaddr = myla;
351 }
352
353 /*
354 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards
355 * allow FDDI-sized (4500) byte packets. Commands only take an
356 * 11-bit parameter, and 11 bits isn't enough to hold a full-size
357 * packet length.
358 * Commands to these cards implicitly upshift a packet size
359 * or threshold by 2 bits.
360 * To detect cards with large-packet support, we probe by setting
361 * the transmit threshold register, then change windows and
362 * read back the threshold register directly, and see if the
363 * threshold value was shifted or not.
364 */
365 bus_space_write_2(iot, ioh, ELINK_COMMAND,
366 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE);
367 GO_WINDOW(5);
368 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH);
369 GO_WINDOW(1);
370 switch (i) {
371 case ELINK_LARGEWIN_PROBE:
372 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK):
373 sc->ep_pktlenshift = 0;
374 break;
375
376 case (ELINK_LARGEWIN_PROBE << 2):
377 sc->ep_pktlenshift = 2;
378 break;
379
380 default:
381 aprint_error_dev(sc->sc_dev,
382 "wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. "
383 "Interface disabled\n",
384 ELINK_LARGEWIN_PROBE, (int) i);
385 return (1);
386 }
387
388 /*
389 * Ensure Tx-available interrupts are enabled for
390 * start the interface.
391 * XXX should be in epinit()?
392 */
393 bus_space_write_2(iot, ioh, ELINK_COMMAND,
394 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift));
395
396 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
397 ifp->if_softc = sc;
398 ifp->if_start = epstart;
399 ifp->if_ioctl = epioctl;
400 ifp->if_watchdog = epwatchdog;
401 ifp->if_init = epinit;
402 ifp->if_stop = epstop;
403 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
404 IFQ_SET_READY(&ifp->if_snd);
405
406 if_attach(ifp);
407 ether_ifattach(ifp, enaddr);
408
409 /*
410 * Finish configuration:
411 * determine chipset if the front-end couldn't do so,
412 * show board details, set media.
413 */
414
415 /*
416 * Print RAM size. We also print the Ethernet address in here.
417 * It's extracted from the ifp, so we have to make sure it's
418 * been attached first.
419 */
420 ep_internalconfig(sc);
421 GO_WINDOW(0);
422
423 /*
424 * Display some additional information, if pertinent.
425 */
426 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER)
427 aprint_normal_dev(sc->sc_dev, "RoadRunner FIFO buffer enabled\n");
428
429 /*
430 * Initialize our media structures and MII info. We'll
431 * probe the MII if we discover that we have one.
432 */
433 mii->mii_ifp = ifp;
434 mii->mii_readreg = ep_mii_readreg;
435 mii->mii_writereg = ep_mii_writereg;
436 mii->mii_statchg = ep_statchg;
437 sc->sc_ethercom.ec_mii = mii;
438 ifmedia_init(&mii->mii_media, IFM_IMASK, ep_media_change,
439 ep_media_status);
440
441 /*
442 * All CORKSCREW chips have MII.
443 */
444 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW)
445 sc->ep_flags |= ELINK_FLAGS_MII;
446
447 /*
448 * Now, determine which media we have.
449 */
450 switch (sc->ep_chipset) {
451 case ELINK_CHIPSET_ROADRUNNER:
452 if (sc->ep_flags & ELINK_FLAGS_MII) {
453 ep_roadrunner_mii_enable(sc);
454 GO_WINDOW(0);
455 }
456 /* FALLTHROUGH */
457
458 case ELINK_CHIPSET_CORKSCREW:
459 case ELINK_CHIPSET_BOOMERANG:
460 /*
461 * If the device has MII, probe it. We won't be using
462 * any `native' media in this case, only PHYs. If
463 * we don't, just treat the Boomerang like the Vortex.
464 */
465 if (sc->ep_flags & ELINK_FLAGS_MII) {
466 mii_attach(sc->sc_dev, mii, 0xffffffff,
467 MII_PHY_ANY, MII_OFFSET_ANY, 0);
468 if (LIST_FIRST(&mii->mii_phys) == NULL) {
469 ifmedia_add(&mii->mii_media,
470 IFM_ETHER | IFM_NONE, 0, NULL);
471 ifmedia_set(&mii->mii_media,
472 IFM_ETHER | IFM_NONE);
473 } else {
474 ifmedia_set(&mii->mii_media,
475 IFM_ETHER | IFM_AUTO);
476 }
477 break;
478 }
479 /* FALLTHROUGH */
480
481 case ELINK_CHIPSET_VORTEX:
482 ep_vortex_probemedia(sc);
483 break;
484
485 default:
486 ep_509_probemedia(sc);
487 break;
488 }
489
490 GO_WINDOW(1); /* Window 1 is operating window */
491
492 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
493 RND_TYPE_NET, RND_FLAG_DEFAULT);
494
495 sc->tx_start_thresh = 20; /* probably a good starting point. */
496
497 /* Establish callback to reset card when we reboot. */
498 if (pmf_device_register1(sc->sc_dev, NULL, NULL, epshutdown))
499 pmf_class_network_register(sc->sc_dev, ifp);
500 else
501 aprint_error_dev(sc->sc_dev,
502 "couldn't establish power handler\n");
503
504 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
505 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
506
507 /* The attach is successful. */
508 sc->sc_flags |= ELINK_FLAGS_ATTACHED;
509 return (0);
510 }
511
512
513 /*
514 * Show interface-model-independent info from window 3
515 * internal-configuration register.
516 */
517 void
ep_internalconfig(struct ep_softc * sc)518 ep_internalconfig(struct ep_softc *sc)
519 {
520 bus_space_tag_t iot = sc->sc_iot;
521 bus_space_handle_t ioh = sc->sc_ioh;
522
523 u_int config0;
524 u_int config1;
525
526 int ram_size, ram_width, ram_split;
527 /*
528 * NVRAM buffer Rx:Tx config names for busmastering cards
529 * (Demon, Vortex, and later).
530 */
531 const char *const onboard_ram_config[] = {
532 "5:3", "3:1", "1:1", "3:5" };
533
534 GO_WINDOW(3);
535 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
536 config1 = (u_int)bus_space_read_2(iot, ioh,
537 ELINK_W3_INTERNAL_CONFIG + 2);
538 GO_WINDOW(0);
539
540 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT;
541 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT;
542
543 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT;
544
545 aprint_normal_dev(sc->sc_dev, "address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n",
546 ether_sprintf(CLLADDR(sc->sc_ethercom.ec_if.if_sadl)),
547 8 << ram_size,
548 (ram_width) ? "word" : "byte",
549 onboard_ram_config[ram_split]);
550 }
551
552
553 /*
554 * Find supported media on 3c509-generation hardware that doesn't have
555 * a "reset_options" register in window 3.
556 * Use the config_cntrl register in window 0 instead.
557 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards
558 * that implement CONFIG_CTRL. We don't have a good way to set the
559 * default active medium; punt to ifconfig instead.
560 */
561 void
ep_509_probemedia(struct ep_softc * sc)562 ep_509_probemedia(struct ep_softc *sc)
563 {
564 bus_space_tag_t iot = sc->sc_iot;
565 bus_space_handle_t ioh = sc->sc_ioh;
566 struct ifmedia *ifm = &sc->sc_mii.mii_media;
567 u_int16_t ep_w0_config, port;
568 const struct ep_media *epm;
569 const char *sep = "", *defmedianame = NULL;
570 int defmedia = 0;
571
572 GO_WINDOW(0);
573 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL);
574
575 aprint_normal_dev(sc->sc_dev, "");
576
577 /* Sanity check that there are any media! */
578 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) {
579 aprint_error("no media present!\n");
580 ifmedia_add(ifm, IFM_ETHER | IFM_NONE, 0, NULL);
581 ifmedia_set(ifm, IFM_ETHER | IFM_NONE);
582 return;
583 }
584
585 /*
586 * Get the default media from the EEPROM.
587 */
588 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14;
589
590 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", "
591
592 for (epm = ep_509_media; epm->epm_name != NULL; epm++) {
593 if (ep_w0_config & epm->epm_mpbit) {
594 /*
595 * This simple test works because 509 chipsets
596 * don't do full-duplex.
597 */
598 if (epm->epm_epmedia == port || defmedia == 0) {
599 defmedia = epm->epm_ifmedia;
600 defmedianame = epm->epm_name;
601 }
602 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia,
603 NULL);
604 PRINT(epm->epm_name);
605 }
606 }
607
608 #undef PRINT
609
610 #ifdef DIAGNOSTIC
611 if (defmedia == 0)
612 panic("ep_509_probemedia: impossible");
613 #endif
614
615 aprint_normal(" (default %s)\n", defmedianame);
616 ifmedia_set(ifm, defmedia);
617 }
618
619 /*
620 * Find media present on large-packet-capable elink3 devices.
621 * Show onboard configuration of large-packet-capable elink3 devices
622 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0.
623 * Use media and card-version info in window 3 instead.
624 */
625 void
ep_vortex_probemedia(struct ep_softc * sc)626 ep_vortex_probemedia(struct ep_softc *sc)
627 {
628 bus_space_tag_t iot = sc->sc_iot;
629 bus_space_handle_t ioh = sc->sc_ioh;
630 struct ifmedia *ifm = &sc->sc_mii.mii_media;
631 const struct ep_media *epm;
632 u_int config1;
633 int reset_options;
634 int default_media; /* 3-bit encoding of default (EEPROM) media */
635 int defmedia = 0;
636 const char *sep = "", *defmedianame = NULL;
637
638 GO_WINDOW(3);
639 config1 = (u_int)bus_space_read_2(iot, ioh,
640 ELINK_W3_INTERNAL_CONFIG + 2);
641 reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);
642 GO_WINDOW(0);
643
644 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT;
645
646 aprint_normal_dev(sc->sc_dev, "");
647
648 /* Sanity check that there are any media! */
649 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) {
650 aprint_error("no media present!\n");
651 ifmedia_add(ifm, IFM_ETHER | IFM_NONE, 0, NULL);
652 ifmedia_set(ifm, IFM_ETHER | IFM_NONE);
653 return;
654 }
655
656 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", "
657
658 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) {
659 if (reset_options & epm->epm_mpbit) {
660 /*
661 * Default media is a little more complicated
662 * on the Vortex. We support full-duplex which
663 * uses the same reset options bit.
664 *
665 * XXX Check EEPROM for default to FDX?
666 */
667 if (epm->epm_epmedia == default_media) {
668 if ((epm->epm_ifmedia & IFM_FDX) == 0) {
669 defmedia = epm->epm_ifmedia;
670 defmedianame = epm->epm_name;
671 }
672 } else if (defmedia == 0) {
673 defmedia = epm->epm_ifmedia;
674 defmedianame = epm->epm_name;
675 }
676 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia,
677 NULL);
678 PRINT(epm->epm_name);
679 }
680 }
681
682 #undef PRINT
683
684 #ifdef DIAGNOSTIC
685 if (defmedia == 0)
686 panic("ep_vortex_probemedia: impossible");
687 #endif
688
689 aprint_normal(" (default %s)\n", defmedianame);
690 ifmedia_set(ifm, defmedia);
691 }
692
693 /*
694 * One second timer, used to tick the MII.
695 */
696 void
ep_tick(void * arg)697 ep_tick(void *arg)
698 {
699 struct ep_softc *sc = arg;
700 int s;
701
702 #ifdef DIAGNOSTIC
703 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0)
704 panic("ep_tick");
705 #endif
706
707 if (!device_is_active(sc->sc_dev))
708 return;
709
710 s = splnet();
711 mii_tick(&sc->sc_mii);
712 splx(s);
713
714 callout_schedule(&sc->sc_mii_callout, hz);
715 }
716
717 /*
718 * Bring device up.
719 *
720 * The order in here seems important. Otherwise we may not receive
721 * interrupts. ?!
722 */
723 int
epinit(struct ifnet * ifp)724 epinit(struct ifnet *ifp)
725 {
726 struct ep_softc *sc = ifp->if_softc;
727 bus_space_tag_t iot = sc->sc_iot;
728 bus_space_handle_t ioh = sc->sc_ioh;
729 int i, error;
730 const u_int8_t *addr;
731
732 if (!sc->enabled && (error = epenable(sc)) != 0)
733 return (error);
734
735 /* Make sure any pending reset has completed before touching board */
736 ep_finish_reset(iot, ioh);
737
738 /*
739 * Cancel any pending I/O.
740 */
741 epstop(ifp, 0);
742
743 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA
744 && sc->bustype != ELINK_BUS_MCA) {
745 GO_WINDOW(0);
746 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0);
747 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL,
748 ENABLE_DRQ_IRQ);
749 }
750
751 if (sc->bustype == ELINK_BUS_PCMCIA) {
752 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00);
753 }
754
755 GO_WINDOW(2);
756 /* Reload the ether_addr. */
757 addr = CLLADDR(ifp->if_sadl);
758 for (i = 0; i < 6; i += 2)
759 bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i,
760 (addr[i] << 0) | (addr[i + 1] << 8));
761
762 /*
763 * Reset the station-address receive filter.
764 * A bug workaround for busmastering (Vortex, Demon) cards.
765 */
766 for (i = 0; i < 6; i += 2)
767 bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0);
768
769 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
770 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
771
772 GO_WINDOW(1); /* Window 1 is operating window */
773 for (i = 0; i < 31; i++)
774 (void)bus_space_read_2(iot, ioh,
775 ep_w1_reg(sc, ELINK_W1_TX_STATUS));
776
777 /* Set threshold for Tx-space available interrupt. */
778 bus_space_write_2(iot, ioh, ELINK_COMMAND,
779 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift));
780
781 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) {
782 /*
783 * Enable options in the PCMCIA LAN COR register, via
784 * RoadRunner Window 1.
785 *
786 * XXX MAGIC CONSTANTS!
787 */
788 u_int16_t cor;
789
790 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11));
791
792 cor = bus_space_read_2(iot, ioh, 0) & ~0x30;
793 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM)
794 cor |= 0x10;
795 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT)
796 cor |= 0x20;
797 bus_space_write_2(iot, ioh, 0, cor);
798
799 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0);
800 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0);
801
802 if (sc->ep_flags & ELINK_FLAGS_MII) {
803 ep_roadrunner_mii_enable(sc);
804 GO_WINDOW(1);
805 }
806 }
807
808 /* Enable interrupts. */
809 bus_space_write_2(iot, ioh, ELINK_COMMAND,
810 SET_RD_0_MASK | WATCHED_INTERRUPTS);
811 bus_space_write_2(iot, ioh, ELINK_COMMAND,
812 SET_INTR_MASK | WATCHED_INTERRUPTS);
813
814 /*
815 * Attempt to get rid of any stray interrupts that occurred during
816 * configuration. On the i386 this isn't possible because one may
817 * already be queued. However, a single stray interrupt is
818 * unimportant.
819 */
820 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff);
821
822 epsetfilter(sc);
823 epsetmedia(sc);
824
825 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE);
826 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
827
828 epmbuffill(sc);
829
830 /* Interface is now `running', with no output active. */
831 ifp->if_flags |= IFF_RUNNING;
832 ifp->if_flags &= ~IFF_OACTIVE;
833
834 if (sc->ep_flags & ELINK_FLAGS_MII) {
835 /* Start the one second clock. */
836 callout_schedule(&sc->sc_mii_callout, hz);
837 }
838
839 /* Attempt to start output, if any. */
840 epstart(ifp);
841
842 return (0);
843 }
844
845
846 /*
847 * Set multicast receive filter.
848 * elink3 hardware has no selective multicast filter in hardware.
849 * Enable reception of all multicasts and filter in software.
850 */
851 void
epsetfilter(struct ep_softc * sc)852 epsetfilter(struct ep_softc *sc)
853 {
854 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
855
856 GO_WINDOW(1); /* Window 1 is operating window */
857 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND,
858 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST |
859 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) |
860 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0));
861 }
862
863 int
ep_media_change(struct ifnet * ifp)864 ep_media_change(struct ifnet *ifp)
865 {
866 struct ep_softc *sc = ifp->if_softc;
867
868 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0)
869 epreset(sc);
870
871 return (0);
872 }
873
874 /*
875 * Reset and enable the MII on the RoadRunner.
876 */
877 void
ep_roadrunner_mii_enable(struct ep_softc * sc)878 ep_roadrunner_mii_enable(struct ep_softc *sc)
879 {
880 bus_space_tag_t iot = sc->sc_iot;
881 bus_space_handle_t ioh = sc->sc_ioh;
882
883 GO_WINDOW(3);
884 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
885 ELINK_PCI_100BASE_MII | ELINK_RUNNER_ENABLE_MII);
886 delay(1000);
887 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
888 ELINK_PCI_100BASE_MII | ELINK_RUNNER_MII_RESET |
889 ELINK_RUNNER_ENABLE_MII);
890 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
891 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
892 delay(1000);
893 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
894 ELINK_PCI_100BASE_MII | ELINK_RUNNER_ENABLE_MII);
895 }
896
897 /*
898 * Set the card to use the specified media.
899 */
900 void
epsetmedia(struct ep_softc * sc)901 epsetmedia(struct ep_softc *sc)
902 {
903 bus_space_tag_t iot = sc->sc_iot;
904 bus_space_handle_t ioh = sc->sc_ioh;
905
906 /* Turn everything off. First turn off linkbeat and UTP. */
907 GO_WINDOW(4);
908 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0);
909
910 /* Turn off coax */
911 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
912 delay(1000);
913
914 /*
915 * If the device has MII, select it, and then tell the
916 * PHY which media to use.
917 */
918 if (sc->ep_flags & ELINK_FLAGS_MII) {
919 int config0, config1;
920
921 GO_WINDOW(3);
922
923 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) {
924 int resopt;
925
926 resopt = bus_space_read_2(iot, ioh,
927 ELINK_W3_RESET_OPTIONS);
928 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
929 resopt | ELINK_RUNNER_ENABLE_MII);
930 }
931
932 config0 = (u_int)bus_space_read_2(iot, ioh,
933 ELINK_W3_INTERNAL_CONFIG);
934 config1 = (u_int)bus_space_read_2(iot, ioh,
935 ELINK_W3_INTERNAL_CONFIG + 2);
936
937 config1 = config1 & ~CONFIG_MEDIAMASK;
938 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT);
939
940 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0);
941 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2,
942 config1);
943 GO_WINDOW(1); /* back to operating window */
944
945 mii_mediachg(&sc->sc_mii);
946 return;
947 }
948
949 /*
950 * Now turn on the selected media/transceiver.
951 */
952 GO_WINDOW(4);
953 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) {
954 case IFM_10_T:
955 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
956 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE);
957 break;
958
959 case IFM_10_2:
960 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER);
961 DELAY(1000); /* 50ms not enmough? */
962 break;
963
964 case IFM_100_TX:
965 case IFM_100_FX:
966 case IFM_100_T4: /* XXX check documentation */
967 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
968 LINKBEAT_ENABLE);
969 DELAY(1000); /* not strictly necessary? */
970 break;
971
972 case IFM_10_5:
973 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
974 SQE_ENABLE);
975 DELAY(1000); /* not strictly necessary? */
976 break;
977
978 case IFM_MANUAL:
979 /*
980 * Nothing to do here; we are actually enabling the
981 * external PHY on the MII port.
982 */
983 break;
984
985 case IFM_NONE:
986 printf("%s: interface disabled\n", device_xname(sc->sc_dev));
987 return;
988
989 default:
990 panic("epsetmedia: impossible");
991 }
992
993 /*
994 * Tell the chip which port to use.
995 */
996 switch (sc->ep_chipset) {
997 case ELINK_CHIPSET_VORTEX:
998 case ELINK_CHIPSET_BOOMERANG:
999 {
1000 int mctl, config0, config1;
1001
1002 GO_WINDOW(3);
1003 config0 = (u_int)bus_space_read_2(iot, ioh,
1004 ELINK_W3_INTERNAL_CONFIG);
1005 config1 = (u_int)bus_space_read_2(iot, ioh,
1006 ELINK_W3_INTERNAL_CONFIG + 2);
1007
1008 config1 = config1 & ~CONFIG_MEDIAMASK;
1009 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data <<
1010 CONFIG_MEDIAMASK_SHIFT);
1011
1012 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0);
1013 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2,
1014 config1);
1015
1016 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
1017 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX)
1018 mctl |= MAC_CONTROL_FDX;
1019 else
1020 mctl &= ~MAC_CONTROL_FDX;
1021 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
1022 break;
1023 }
1024 default:
1025 {
1026 int w0_addr_cfg;
1027
1028 GO_WINDOW(0);
1029 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG);
1030 w0_addr_cfg &= 0x3fff;
1031 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg |
1032 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14));
1033 DELAY(1000);
1034 break;
1035 }
1036 }
1037
1038 GO_WINDOW(1); /* Window 1 is operating window */
1039 }
1040
1041 /*
1042 * Get currently-selected media from card.
1043 * (if_media callback, may be called before interface is brought up).
1044 */
1045 void
ep_media_status(struct ifnet * ifp,struct ifmediareq * req)1046 ep_media_status(struct ifnet *ifp, struct ifmediareq *req)
1047 {
1048 struct ep_softc *sc = ifp->if_softc;
1049 bus_space_tag_t iot = sc->sc_iot;
1050 bus_space_handle_t ioh = sc->sc_ioh;
1051
1052 if (sc->enabled == 0) {
1053 req->ifm_active = IFM_ETHER | IFM_NONE;
1054 req->ifm_status = 0;
1055 return;
1056 }
1057
1058 /*
1059 * If we have MII, go ask the PHY what's going on.
1060 */
1061 if (sc->ep_flags & ELINK_FLAGS_MII) {
1062 mii_pollstat(&sc->sc_mii);
1063 req->ifm_active = sc->sc_mii.mii_media_active;
1064 req->ifm_status = sc->sc_mii.mii_media_status;
1065 return;
1066 }
1067
1068 /*
1069 * Ok, at this point we claim that our active media is
1070 * the currently selected media. We'll update our status
1071 * if our chipset allows us to detect link.
1072 */
1073 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media;
1074 req->ifm_status = 0;
1075
1076 switch (sc->ep_chipset) {
1077 case ELINK_CHIPSET_VORTEX:
1078 case ELINK_CHIPSET_BOOMERANG:
1079 GO_WINDOW(4);
1080 req->ifm_status = IFM_AVALID;
1081 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) &
1082 LINKBEAT_DETECT)
1083 req->ifm_status |= IFM_ACTIVE;
1084 GO_WINDOW(1); /* back to operating window */
1085 break;
1086 }
1087 }
1088
1089
1090
1091 /*
1092 * Start outputting on the interface.
1093 * Always called as splnet().
1094 */
1095 void
epstart(struct ifnet * ifp)1096 epstart(struct ifnet *ifp)
1097 {
1098 struct ep_softc *sc = ifp->if_softc;
1099 bus_space_tag_t iot = sc->sc_iot;
1100 bus_space_handle_t ioh = sc->sc_ioh;
1101 struct mbuf *m, *m0;
1102 int sh, len, pad;
1103 bus_size_t txreg;
1104
1105 /* Don't transmit if interface is busy or not running */
1106 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1107 return;
1108
1109 startagain:
1110 /* Sneak a peek at the next packet */
1111 IFQ_POLL(&ifp->if_snd, m0);
1112 if (m0 == 0)
1113 return;
1114
1115 /* We need to use m->m_pkthdr.len, so require the header */
1116 if ((m0->m_flags & M_PKTHDR) == 0)
1117 panic("epstart: no header mbuf");
1118 len = m0->m_pkthdr.len;
1119
1120 pad = (4 - len) & 3;
1121
1122 /*
1123 * The 3c509 automatically pads short packets to minimum ethernet
1124 * length, but we drop packets that are too large. Perhaps we should
1125 * truncate them instead?
1126 */
1127 if (len + pad > ETHER_MAX_LEN) {
1128 /* packet is obviously too large: toss it */
1129 if_statinc(ifp, if_oerrors);
1130 IFQ_DEQUEUE(&ifp->if_snd, m0);
1131 m_freem(m0);
1132 goto readcheck;
1133 }
1134
1135 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) <
1136 len + pad + 4) {
1137 bus_space_write_2(iot, ioh, ELINK_COMMAND,
1138 SET_TX_AVAIL_THRESH |
1139 ((len + pad + 4) >> sc->ep_pktlenshift));
1140 /* not enough room in FIFO */
1141 ifp->if_flags |= IFF_OACTIVE;
1142 return;
1143 } else {
1144 bus_space_write_2(iot, ioh, ELINK_COMMAND,
1145 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE);
1146 }
1147
1148 IFQ_DEQUEUE(&ifp->if_snd, m0);
1149 if (m0 == 0) /* not really needed */
1150 return;
1151
1152 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH |
1153 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/));
1154
1155 bpf_mtap(ifp, m0, BPF_D_OUT);
1156
1157 /*
1158 * Do the output at a high interrupt priority level so that an
1159 * interrupt from another device won't cause a FIFO underrun.
1160 * We choose splsched() since that blocks essentially everything
1161 * except for interrupts from serial devices (which typically
1162 * lose data if their interrupt isn't serviced fast enough).
1163 *
1164 * XXX THIS CAN CAUSE CLOCK DRIFT!
1165 */
1166 sh = splsched();
1167
1168 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1);
1169
1170 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) {
1171 /*
1172 * Prime the FIFO buffer counter (number of 16-bit
1173 * words about to be written to the FIFO).
1174 *
1175 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS
1176 * COUNTER IS NON-ZERO!
1177 */
1178 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL,
1179 (len + pad) >> 1);
1180 }
1181
1182 bus_space_write_2(iot, ioh, txreg, len);
1183 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */
1184 if (ELINK_IS_BUS_32(sc->bustype)) {
1185 for (m = m0; m;) {
1186 if (m->m_len > 3) {
1187 /* align our reads from core */
1188 if (mtod(m, u_long) & 3) {
1189 u_long count =
1190 4 - (mtod(m, u_long) & 3);
1191 bus_space_write_multi_1(iot, ioh,
1192 txreg, mtod(m, u_int8_t *), count);
1193 m->m_data =
1194 (void *)(mtod(m, u_long) + count);
1195 m->m_len -= count;
1196 }
1197 bus_space_write_multi_stream_4(iot, ioh,
1198 txreg, mtod(m, u_int32_t *), m->m_len >> 2);
1199 m->m_data = (void *)(mtod(m, u_long) +
1200 (u_long)(m->m_len & ~3));
1201 m->m_len -= m->m_len & ~3;
1202 }
1203 if (m->m_len) {
1204 bus_space_write_multi_1(iot, ioh,
1205 txreg, mtod(m, u_int8_t *), m->m_len);
1206 }
1207 m = m0 = m_free(m);
1208 }
1209 } else {
1210 for (m = m0; m;) {
1211 if (m->m_len > 1) {
1212 if (mtod(m, u_long) & 1) {
1213 bus_space_write_1(iot, ioh,
1214 txreg, *(mtod(m, u_int8_t *)));
1215 m->m_data =
1216 (void *)(mtod(m, u_long) + 1);
1217 m->m_len -= 1;
1218 }
1219 bus_space_write_multi_stream_2(iot, ioh,
1220 txreg, mtod(m, u_int16_t *),
1221 m->m_len >> 1);
1222 }
1223 if (m->m_len & 1) {
1224 bus_space_write_1(iot, ioh, txreg,
1225 *(mtod(m, u_int8_t *) + m->m_len - 1));
1226 }
1227 m = m0 = m_free(m);
1228 }
1229 }
1230 while (pad--)
1231 bus_space_write_1(iot, ioh, txreg, 0);
1232
1233 splx(sh);
1234
1235 if_statinc(ifp, if_opackets);
1236
1237 readcheck:
1238 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) &
1239 ERR_INCOMPLETE) == 0) {
1240 /* We received a complete packet. */
1241 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS);
1242
1243 if ((status & INTR_LATCH) == 0) {
1244 /*
1245 * No interrupt, read the packet and continue
1246 * Is this supposed to happen? Is my motherboard
1247 * completely busted?
1248 */
1249 epread(sc);
1250 } else {
1251 /* Got an interrupt, return so that it gets serviced. */
1252 return;
1253 }
1254 } else {
1255 /* Check if we are stuck and reset [see XXX comment] */
1256 if (epstatus(sc)) {
1257 if (ifp->if_flags & IFF_DEBUG)
1258 printf("%s: adapter reset\n",
1259 device_xname(sc->sc_dev));
1260 epreset(sc);
1261 }
1262 }
1263
1264 goto startagain;
1265 }
1266
1267
1268 /*
1269 * XXX: The 3c509 card can get in a mode where both the fifo status bit
1270 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set
1271 * We detect this situation and we reset the adapter.
1272 * It happens at times when there is a lot of broadcast traffic
1273 * on the cable (once in a blue moon).
1274 */
1275 static int
epstatus(struct ep_softc * sc)1276 epstatus(struct ep_softc *sc)
1277 {
1278 bus_space_tag_t iot = sc->sc_iot;
1279 bus_space_handle_t ioh = sc->sc_ioh;
1280 u_int16_t fifost;
1281
1282 /*
1283 * Check the FIFO status and act accordingly
1284 */
1285 GO_WINDOW(4);
1286 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG);
1287 GO_WINDOW(1);
1288
1289 if (fifost & FIFOS_RX_UNDERRUN) {
1290 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1291 printf("%s: RX underrun\n", device_xname(sc->sc_dev));
1292 epreset(sc);
1293 return 0;
1294 }
1295
1296 if (fifost & FIFOS_RX_STATUS_OVERRUN) {
1297 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1298 printf("%s: RX Status overrun\n", device_xname(sc->sc_dev));
1299 return 1;
1300 }
1301
1302 if (fifost & FIFOS_RX_OVERRUN) {
1303 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1304 printf("%s: RX overrun\n", device_xname(sc->sc_dev));
1305 return 1;
1306 }
1307
1308 if (fifost & FIFOS_TX_OVERRUN) {
1309 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1310 printf("%s: TX overrun\n", device_xname(sc->sc_dev));
1311 epreset(sc);
1312 return 0;
1313 }
1314
1315 return 0;
1316 }
1317
1318
1319 static void
eptxstat(struct ep_softc * sc)1320 eptxstat(struct ep_softc *sc)
1321 {
1322 bus_space_tag_t iot = sc->sc_iot;
1323 bus_space_handle_t ioh = sc->sc_ioh;
1324 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1325 int i;
1326
1327 /*
1328 * We need to read+write TX_STATUS until we get a 0 status
1329 * in order to turn off the interrupt flag.
1330 */
1331 while ((i = bus_space_read_2(iot, ioh,
1332 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) {
1333 bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS),
1334 0x0);
1335
1336 if (i & TXS_JABBER) {
1337 if_statinc(ifp, if_oerrors);
1338 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1339 printf("%s: jabber (%x)\n",
1340 device_xname(sc->sc_dev), i);
1341 epreset(sc);
1342 } else if (i & TXS_UNDERRUN) {
1343 if_statinc(ifp, if_oerrors);
1344 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1345 printf("%s: fifo underrun (%x) @%d\n",
1346 device_xname(sc->sc_dev), i,
1347 sc->tx_start_thresh);
1348 if (sc->tx_succ_ok < 100)
1349 sc->tx_start_thresh = uimin(ETHER_MAX_LEN,
1350 sc->tx_start_thresh + 20);
1351 sc->tx_succ_ok = 0;
1352 epreset(sc);
1353 } else if (i & TXS_MAX_COLLISION) {
1354 if_statinc(ifp, if_collisions);
1355 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
1356 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
1357 } else
1358 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
1359 }
1360 }
1361
1362 int
epintr(void * arg)1363 epintr(void *arg)
1364 {
1365 struct ep_softc *sc = arg;
1366 bus_space_tag_t iot = sc->sc_iot;
1367 bus_space_handle_t ioh = sc->sc_ioh;
1368 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1369 u_int16_t status;
1370 int ret = 0;
1371
1372 if (sc->enabled == 0 || !device_is_active(sc->sc_dev))
1373 return (0);
1374
1375
1376 for (;;) {
1377 status = bus_space_read_2(iot, ioh, ELINK_STATUS);
1378
1379 if ((status & WATCHED_INTERRUPTS) == 0) {
1380 if ((status & INTR_LATCH) == 0) {
1381 #if 0
1382 printf("%s: intr latch cleared\n",
1383 device_xname(sc->sc_dev));
1384 #endif
1385 break;
1386 }
1387 }
1388
1389 ret = 1;
1390
1391 /*
1392 * Acknowledge any interrupts. It's important that we do this
1393 * first, since there would otherwise be a race condition.
1394 * Due to the i386 interrupt queueing, we may get spurious
1395 * interrupts occasionally.
1396 */
1397 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR |
1398 (status & (INTR_LATCH | ALL_INTERRUPTS)));
1399
1400 #if 0
1401 status = bus_space_read_2(iot, ioh, ELINK_STATUS);
1402
1403 printf("%s: intr%s%s%s%s\n", device_xname(sc->sc_dev),
1404 (status & RX_COMPLETE)?" RX_COMPLETE":"",
1405 (status & TX_COMPLETE)?" TX_COMPLETE":"",
1406 (status & TX_AVAIL)?" TX_AVAIL":"",
1407 (status & CARD_FAILURE)?" CARD_FAILURE":"");
1408 #endif
1409
1410 if (status & RX_COMPLETE) {
1411 epread(sc);
1412 }
1413 if (status & TX_AVAIL) {
1414 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
1415 epstart(&sc->sc_ethercom.ec_if);
1416 }
1417 if (status & CARD_FAILURE) {
1418 printf("%s: adapter failure (%x)\n",
1419 device_xname(sc->sc_dev), status);
1420 #if 1
1421 epinit(ifp);
1422 #else
1423 epreset(sc);
1424 #endif
1425 return (1);
1426 }
1427 if (status & TX_COMPLETE) {
1428 eptxstat(sc);
1429 epstart(ifp);
1430 }
1431
1432 if (status)
1433 rnd_add_uint32(&sc->rnd_source, status);
1434 }
1435
1436 /* no more interrupts */
1437 return (ret);
1438 }
1439
1440 void
epread(struct ep_softc * sc)1441 epread(struct ep_softc *sc)
1442 {
1443 bus_space_tag_t iot = sc->sc_iot;
1444 bus_space_handle_t ioh = sc->sc_ioh;
1445 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1446 struct mbuf *m;
1447 int len;
1448
1449 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS));
1450
1451 again:
1452 if (ifp->if_flags & IFF_DEBUG) {
1453 int err = len & ERR_MASK;
1454 const char *s = NULL;
1455
1456 if (len & ERR_INCOMPLETE)
1457 s = "incomplete packet";
1458 else if (err == ERR_OVERRUN)
1459 s = "packet overrun";
1460 else if (err == ERR_RUNT)
1461 s = "runt packet";
1462 else if (err == ERR_ALIGNMENT)
1463 s = "bad alignment";
1464 else if (err == ERR_CRC)
1465 s = "bad crc";
1466 else if (err == ERR_OVERSIZE)
1467 s = "oversized packet";
1468 else if (err == ERR_DRIBBLE)
1469 s = "dribble bits";
1470
1471 if (s)
1472 printf("%s: %s\n", device_xname(sc->sc_dev), s);
1473 }
1474
1475 if (len & ERR_INCOMPLETE)
1476 return;
1477
1478 if (len & ERR_RX) {
1479 if_statinc(ifp, if_ierrors);
1480 goto abort;
1481 }
1482
1483 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */
1484
1485 /* Pull packet off interface. */
1486 m = epget(sc, len);
1487 if (m == 0) {
1488 if_statinc(ifp, if_ierrors);
1489 goto abort;
1490 }
1491
1492 if_percpuq_enqueue(ifp->if_percpuq, m);
1493
1494 /*
1495 * In periods of high traffic we can actually receive enough
1496 * packets so that the fifo overrun bit will be set at this point,
1497 * even though we just read a packet. In this case we
1498 * are not going to receive any more interrupts. We check for
1499 * this condition and read again until the fifo is not full.
1500 * We could simplify this test by not using epstatus(), but
1501 * rechecking the RX_STATUS register directly. This test could
1502 * result in unnecessary looping in cases where there is a new
1503 * packet but the fifo is not full, but it will not fix the
1504 * stuck behavior.
1505 *
1506 * Even with this improvement, we still get packet overrun errors
1507 * which are hurting performance. Maybe when I get some more time
1508 * I'll modify epread() so that it can handle RX_EARLY interrupts.
1509 */
1510 if (epstatus(sc)) {
1511 len = bus_space_read_2(iot, ioh,
1512 ep_w1_reg(sc, ELINK_W1_RX_STATUS));
1513 /* Check if we are stuck and reset [see XXX comment] */
1514 if (len & ERR_INCOMPLETE) {
1515 if (ifp->if_flags & IFF_DEBUG)
1516 printf("%s: adapter reset\n",
1517 device_xname(sc->sc_dev));
1518 epreset(sc);
1519 return;
1520 }
1521 goto again;
1522 }
1523
1524 return;
1525
1526 abort:
1527 ep_discard_rxtop(iot, ioh);
1528
1529 }
1530
1531 struct mbuf *
epget(struct ep_softc * sc,int totlen)1532 epget(struct ep_softc *sc, int totlen)
1533 {
1534 bus_space_tag_t iot = sc->sc_iot;
1535 bus_space_handle_t ioh = sc->sc_ioh;
1536 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1537 struct mbuf *m;
1538 bus_size_t rxreg;
1539 int len, remaining;
1540 int s;
1541 void *newdata;
1542 u_long offset;
1543
1544 m = sc->mb[sc->next_mb];
1545 sc->mb[sc->next_mb] = 0;
1546 if (m == 0) {
1547 MGETHDR(m, M_DONTWAIT, MT_DATA);
1548 if (m == 0)
1549 return 0;
1550 } else {
1551 /* If the queue is no longer full, refill. */
1552 if (sc->last_mb == sc->next_mb)
1553 callout_schedule(&sc->sc_mbuf_callout, 1);
1554
1555 /* Convert one of our saved mbuf's. */
1556 sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
1557 m->m_data = m->m_pktdat;
1558 m->m_flags = M_PKTHDR;
1559 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr));
1560 }
1561 m_set_rcvif(m, ifp);
1562 m->m_pkthdr.len = totlen;
1563 len = MHLEN;
1564
1565 /*
1566 * Allocate big enough space to hold whole packet, to avoid
1567 * allocating new mbufs on splsched().
1568 */
1569 if (totlen + ALIGNBYTES > len) {
1570 if (totlen + ALIGNBYTES > MCLBYTES) {
1571 len = ALIGN(totlen + ALIGNBYTES);
1572 MEXTMALLOC(m, len, M_DONTWAIT);
1573 } else {
1574 len = MCLBYTES;
1575 MCLGET(m, M_DONTWAIT);
1576 }
1577 if ((m->m_flags & M_EXT) == 0) {
1578 m_free(m);
1579 return 0;
1580 }
1581 }
1582
1583 /* align the struct ip header */
1584 newdata = (char *)ALIGN(m->m_data + sizeof(struct ether_header))
1585 - sizeof(struct ether_header);
1586 m->m_data = newdata;
1587 m->m_len = totlen;
1588
1589 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1);
1590 remaining = totlen;
1591 offset = mtod(m, u_long);
1592
1593 /*
1594 * We read the packet at a high interrupt priority level so that
1595 * an interrupt from another device won't cause the card's packet
1596 * buffer to overflow. We choose splsched() since that blocks
1597 * essentially everything except for interrupts from serial
1598 * devices (which typically lose data if their interrupt isn't
1599 * serviced fast enough).
1600 *
1601 * XXX THIS CAN CAUSE CLOCK DRIFT!
1602 */
1603 s = splsched();
1604
1605 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) {
1606 /*
1607 * Prime the FIFO buffer counter (number of 16-bit
1608 * words about to be read from the FIFO).
1609 *
1610 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS
1611 * COUNTER IS NON-ZERO!
1612 */
1613 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1);
1614 }
1615
1616 if (ELINK_IS_BUS_32(sc->bustype)) {
1617 /*
1618 * Read bytes up to the point where we are aligned.
1619 * (We can align to 4 bytes, rather than ALIGNBYTES,
1620 * here because we're later reading 4-byte chunks.)
1621 */
1622 if ((remaining > 3) && (offset & 3)) {
1623 int count = (4 - (offset & 3));
1624 bus_space_read_multi_1(iot, ioh,
1625 rxreg, (u_int8_t *) offset, count);
1626 offset += count;
1627 remaining -= count;
1628 }
1629 if (remaining > 3) {
1630 bus_space_read_multi_stream_4(iot, ioh,
1631 rxreg, (u_int32_t *) offset,
1632 remaining >> 2);
1633 offset += remaining & ~3;
1634 remaining &= 3;
1635 }
1636 if (remaining) {
1637 bus_space_read_multi_1(iot, ioh,
1638 rxreg, (u_int8_t *) offset, remaining);
1639 }
1640 } else {
1641 /* (offset & 1) == 0 since IP header is aligned */
1642 if (remaining > 1) {
1643 bus_space_read_multi_stream_2(iot, ioh,
1644 rxreg, (u_int16_t *) offset,
1645 remaining >> 1);
1646 offset += remaining & ~1;
1647 }
1648 if (remaining & 1) {
1649 *(uint8_t *)offset =
1650 bus_space_read_1(iot, ioh, rxreg);
1651 }
1652 }
1653
1654 ep_discard_rxtop(iot, ioh);
1655
1656 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER)
1657 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0);
1658 splx(s);
1659
1660 return (m);
1661 }
1662
1663 int
epioctl(struct ifnet * ifp,u_long cmd,void * data)1664 epioctl(struct ifnet *ifp, u_long cmd, void *data)
1665 {
1666 struct ep_softc *sc = ifp->if_softc;
1667 int s, error = 0;
1668
1669 s = splnet();
1670
1671 switch (cmd) {
1672 case SIOCADDMULTI:
1673 case SIOCDELMULTI:
1674 if (sc->enabled == 0) {
1675 error = EIO;
1676 break;
1677 }
1678
1679 /* FALLTHROUGH */
1680 default:
1681 error = ether_ioctl(ifp, cmd, data);
1682
1683 if (error == ENETRESET) {
1684 /*
1685 * Multicast list has changed; set the hardware filter
1686 * accordingly.
1687 */
1688 if (ifp->if_flags & IFF_RUNNING)
1689 epreset(sc);
1690 error = 0;
1691 }
1692 break;
1693 }
1694
1695 splx(s);
1696 return (error);
1697 }
1698
1699 void
epreset(struct ep_softc * sc)1700 epreset(struct ep_softc *sc)
1701 {
1702 int s;
1703
1704 s = splnet();
1705 epinit(&sc->sc_ethercom.ec_if);
1706 splx(s);
1707 }
1708
1709 void
epwatchdog(struct ifnet * ifp)1710 epwatchdog(struct ifnet *ifp)
1711 {
1712 struct ep_softc *sc = ifp->if_softc;
1713
1714 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev));
1715 if_statinc(ifp, if_oerrors);
1716
1717 epreset(sc);
1718 }
1719
1720 void
epstop(struct ifnet * ifp,int disable)1721 epstop(struct ifnet *ifp, int disable)
1722 {
1723 struct ep_softc *sc = ifp->if_softc;
1724 bus_space_tag_t iot = sc->sc_iot;
1725 bus_space_handle_t ioh = sc->sc_ioh;
1726
1727 if (sc->ep_flags & ELINK_FLAGS_MII) {
1728 /* Stop the one second clock. */
1729 callout_stop(&sc->sc_mbuf_callout);
1730
1731 /* Down the MII. */
1732 mii_down(&sc->sc_mii);
1733 }
1734
1735 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) {
1736 /*
1737 * Clear the FIFO buffer count, thus halting
1738 * any currently-running transactions.
1739 */
1740 GO_WINDOW(1); /* sanity */
1741 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0);
1742 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0);
1743 }
1744
1745 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE);
1746 ep_discard_rxtop(iot, ioh);
1747
1748 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE);
1749 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
1750
1751 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
1752 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
1753
1754 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH);
1755 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK);
1756 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK);
1757 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER);
1758
1759 epmbufempty(sc);
1760
1761 if (disable)
1762 epdisable(sc);
1763
1764 ifp->if_flags &= ~IFF_RUNNING;
1765 }
1766
1767
1768 /*
1769 * Before reboots, reset card completely.
1770 */
1771 static bool
epshutdown(device_t self,int howto)1772 epshutdown(device_t self, int howto)
1773 {
1774 struct ep_softc *sc = device_private(self);
1775 int s = splnet();
1776
1777 if (sc->enabled) {
1778 epstop(&sc->sc_ethercom.ec_if, 0);
1779 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET);
1780 epdisable(sc);
1781 sc->enabled = 0;
1782 }
1783 splx(s);
1784
1785 return true;
1786 }
1787
1788 /*
1789 * We get eeprom data from the id_port given an offset into the
1790 * eeprom. Basically; after the ID_sequence is sent to all of
1791 * the cards; they enter the ID_CMD state where they will accept
1792 * command requests. 0x80-0xbf loads the eeprom data. We then
1793 * read the port 16 times and with every read; the cards check
1794 * for contention (ie: if one card writes a 0 bit and another
1795 * writes a 1 bit then the host sees a 0. At the end of the cycle;
1796 * each card compares the data on the bus; if there is a difference
1797 * then that card goes into ID_WAIT state again). In the meantime;
1798 * one bit of data is returned in the AX register which is conveniently
1799 * returned to us by bus_space_read_2(). Hence; we read 16 times getting one
1800 * bit of data with each read.
1801 *
1802 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT!
1803 */
1804 u_int16_t
epreadeeprom(bus_space_tag_t iot,bus_space_handle_t ioh,int offset)1805 epreadeeprom(bus_space_tag_t iot, bus_space_handle_t ioh, int offset)
1806 {
1807 u_int16_t data = 0;
1808 int i;
1809
1810 bus_space_write_2(iot, ioh, 0, 0x80 + offset);
1811 delay(1000);
1812 for (i = 0; i < 16; i++)
1813 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1);
1814 return (data);
1815 }
1816
1817 static int
epbusyeeprom(struct ep_softc * sc)1818 epbusyeeprom(struct ep_softc *sc)
1819 {
1820 bus_space_tag_t iot = sc->sc_iot;
1821 bus_space_handle_t ioh = sc->sc_ioh;
1822 bus_size_t eecmd;
1823 int i = 100, j;
1824 uint16_t busybit;
1825
1826 if (sc->bustype == ELINK_BUS_PCMCIA) {
1827 delay(1000);
1828 return 0;
1829 }
1830
1831 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) {
1832 eecmd = CORK_ASIC_EEPROM_COMMAND;
1833 busybit = CORK_EEPROM_BUSY;
1834 } else {
1835 eecmd = ELINK_W0_EEPROM_COMMAND;
1836 busybit = EEPROM_BUSY;
1837 }
1838
1839 j = 0; /* bad GCC flow analysis */
1840 while (i--) {
1841 j = bus_space_read_2(iot, ioh, eecmd);
1842 if (j & busybit)
1843 delay(100);
1844 else
1845 break;
1846 }
1847 if (i == 0) {
1848 aprint_normal("\n");
1849 aprint_error_dev(sc->sc_dev, "eeprom failed to come ready\n");
1850 return (1);
1851 }
1852 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW &&
1853 (j & EEPROM_TST_MODE) != 0) {
1854 /* XXX PnP mode? */
1855 printf("\n%s: erase pencil mark!\n", device_xname(sc->sc_dev));
1856 return (1);
1857 }
1858 return (0);
1859 }
1860
1861 u_int16_t
ep_read_eeprom(struct ep_softc * sc,u_int16_t offset)1862 ep_read_eeprom(struct ep_softc *sc, u_int16_t offset)
1863 {
1864 bus_size_t eecmd, eedata;
1865 u_int16_t readcmd;
1866
1867 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) {
1868 eecmd = CORK_ASIC_EEPROM_COMMAND;
1869 eedata = CORK_ASIC_EEPROM_DATA;
1870 } else {
1871 eecmd = ELINK_W0_EEPROM_COMMAND;
1872 eedata = ELINK_W0_EEPROM_DATA;
1873 }
1874
1875 /*
1876 * RoadRunner has a larger EEPROM, so a different read command
1877 * is required.
1878 */
1879 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER)
1880 readcmd = READ_EEPROM_RR;
1881 else
1882 readcmd = READ_EEPROM;
1883
1884 if (epbusyeeprom(sc))
1885 return (0); /* XXX why is eeprom busy? */
1886
1887 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset);
1888
1889 if (epbusyeeprom(sc))
1890 return (0); /* XXX why is eeprom busy? */
1891
1892 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata));
1893 }
1894
1895 void
epmbuffill(void * v)1896 epmbuffill(void *v)
1897 {
1898 struct ep_softc *sc = v;
1899 struct mbuf *m;
1900 int s, i;
1901
1902 s = splnet();
1903 i = sc->last_mb;
1904 do {
1905 if (sc->mb[i] == 0) {
1906 MGET(m, M_DONTWAIT, MT_DATA);
1907 if (m == 0)
1908 break;
1909 sc->mb[i] = m;
1910 }
1911 i = (i + 1) % MAX_MBS;
1912 } while (i != sc->next_mb);
1913 sc->last_mb = i;
1914 /* If the queue was not filled, try again. */
1915 if (sc->last_mb != sc->next_mb)
1916 callout_schedule(&sc->sc_mbuf_callout, 1);
1917 splx(s);
1918 }
1919
1920 void
epmbufempty(struct ep_softc * sc)1921 epmbufempty(struct ep_softc *sc)
1922 {
1923 int s, i;
1924
1925 s = splnet();
1926 for (i = 0; i < MAX_MBS; i++) {
1927 m_freem(sc->mb[i]);
1928 sc->mb[i] = NULL;
1929 }
1930 sc->last_mb = sc->next_mb = 0;
1931 callout_stop(&sc->sc_mbuf_callout);
1932 splx(s);
1933 }
1934
1935 int
epenable(struct ep_softc * sc)1936 epenable(struct ep_softc *sc)
1937 {
1938
1939 if (sc->enabled == 0 && sc->enable != NULL) {
1940 if ((*sc->enable)(sc) != 0) {
1941 aprint_error_dev(sc->sc_dev, "device enable failed\n");
1942 return (EIO);
1943 }
1944 }
1945
1946 sc->enabled = 1;
1947 return (0);
1948 }
1949
1950 void
epdisable(struct ep_softc * sc)1951 epdisable(struct ep_softc *sc)
1952 {
1953
1954 if (sc->enabled != 0 && sc->disable != NULL) {
1955 (*sc->disable)(sc);
1956 sc->enabled = 0;
1957 }
1958 }
1959
1960 /*
1961 * ep_activate:
1962 *
1963 * Handle device activation/deactivation requests.
1964 */
1965 int
ep_activate(device_t self,enum devact act)1966 ep_activate(device_t self, enum devact act)
1967 {
1968 struct ep_softc *sc = device_private(self);
1969
1970 switch (act) {
1971 case DVACT_DEACTIVATE:
1972 if_deactivate(&sc->sc_ethercom.ec_if);
1973 return 0;
1974 default:
1975 return EOPNOTSUPP;
1976 }
1977 }
1978
1979 /*
1980 * ep_detach:
1981 *
1982 * Detach a elink3 interface.
1983 */
1984 int
ep_detach(device_t self,int flags)1985 ep_detach(device_t self, int flags)
1986 {
1987 struct ep_softc *sc = device_private(self);
1988 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1989
1990 /* Succeed now if there's no work to do. */
1991 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0)
1992 return (0);
1993
1994 epdisable(sc);
1995
1996 callout_stop(&sc->sc_mii_callout);
1997 callout_stop(&sc->sc_mbuf_callout);
1998
1999 if (sc->ep_flags & ELINK_FLAGS_MII) {
2000 /* Detach all PHYs */
2001 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
2002 }
2003
2004 rnd_detach_source(&sc->rnd_source);
2005 ether_ifdetach(ifp);
2006 if_detach(ifp);
2007
2008 /* Delete all remaining media. */
2009 ifmedia_fini(&sc->sc_mii.mii_media);
2010
2011 pmf_device_deregister(sc->sc_dev);
2012
2013 return (0);
2014 }
2015
2016 u_int32_t
ep_mii_bitbang_read(device_t self)2017 ep_mii_bitbang_read(device_t self)
2018 {
2019 struct ep_softc *sc = device_private(self);
2020
2021 /* We're already in Window 4. */
2022 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh,
2023 ELINK_W4_BOOM_PHYSMGMT));
2024 }
2025
2026 void
ep_mii_bitbang_write(device_t self,u_int32_t val)2027 ep_mii_bitbang_write(device_t self, u_int32_t val)
2028 {
2029 struct ep_softc *sc = device_private(self);
2030
2031 /* We're already in Window 4. */
2032 bus_space_write_2(sc->sc_iot, sc->sc_ioh,
2033 ELINK_W4_BOOM_PHYSMGMT, val);
2034 }
2035
2036 int
ep_mii_readreg(device_t self,int phy,int reg,uint16_t * val)2037 ep_mii_readreg(device_t self, int phy, int reg, uint16_t *val)
2038 {
2039 struct ep_softc *sc = device_private(self);
2040 int rv;
2041
2042 GO_WINDOW(4);
2043
2044 rv = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg, val);
2045
2046 GO_WINDOW(1);
2047
2048 return rv;
2049 }
2050
2051 int
ep_mii_writereg(device_t self,int phy,int reg,uint16_t val)2052 ep_mii_writereg(device_t self, int phy, int reg, uint16_t val)
2053 {
2054 struct ep_softc *sc = device_private(self);
2055 int rv;
2056
2057 GO_WINDOW(4);
2058
2059 rv = mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val);
2060
2061 GO_WINDOW(1);
2062
2063 return rv;
2064 }
2065
2066 void
ep_statchg(struct ifnet * ifp)2067 ep_statchg(struct ifnet *ifp)
2068 {
2069 struct ep_softc *sc = ifp->if_softc;
2070 bus_space_tag_t iot = sc->sc_iot;
2071 bus_space_handle_t ioh = sc->sc_ioh;
2072 int mctl;
2073
2074 GO_WINDOW(3);
2075 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
2076 if (sc->sc_mii.mii_media_active & IFM_FDX)
2077 mctl |= MAC_CONTROL_FDX;
2078 else
2079 mctl &= ~MAC_CONTROL_FDX;
2080 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
2081 GO_WINDOW(1); /* back to operating window */
2082 }
2083
2084 void
ep_power(int why,void * arg)2085 ep_power(int why, void *arg)
2086 {
2087 struct ep_softc *sc = arg;
2088 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2089 int s;
2090
2091 s = splnet();
2092 switch (why) {
2093 case PWR_SUSPEND:
2094 case PWR_STANDBY:
2095 epstop(ifp, 1);
2096 break;
2097 case PWR_RESUME:
2098 if (ifp->if_flags & IFF_UP) {
2099 (void)epinit(ifp);
2100 }
2101 break;
2102 case PWR_SOFTSUSPEND:
2103 case PWR_SOFTSTANDBY:
2104 case PWR_SOFTRESUME:
2105 break;
2106 }
2107 splx(s);
2108 }
2109