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Searched refs:icr (Results 1 – 23 of 23) sorted by relevance

/netbsd/src/sys/arch/amiga/amiga/
Dcia.c111 dispatch_cia_ints (0, ciaa.icr); in ciaa_intr()
123 dispatch_cia_ints (1, ciab.icr); in ciab_intr()
Damiga_init.c864 ciaa.icr = 0x7f; /* and keyboard */ in start_c_finish()
865 ciab.icr = 0x7f; /* and again */ in start_c_finish()
889 ciaa.icr = 0x7f; /* and keyboard */ in start_c_finish()
890 ciab.icr = 0x7f; /* and again */ in start_c_finish()
Dcia.h51 volatile unsigned char icr; char padd[0xff]; member
Dgenassym.cf186 define CIAICR offsetof(struct CIA, icr)
/netbsd/src/sys/arch/amiga/dev/
Dclock.c178 clockcia->icr = 1 << 0; /* disable timer A interrupt */ in clockattach()
179 interval = clockcia->icr; /* and make sure it's clear */ in clockattach()
218 clockcia->icr = (1<<7) | (1<<0); in cpu_initclocks()
620 clockcia->icr = (1<<7) | (1<<1); in startprofclock()
Dkbd.c300 ciaa.icr = CIA_ICR_SP; /* CIA SP interrupt disable */ in kbdenable()
308 ciaa.icr = CIA_ICR_IR_SC | CIA_ICR_SP; in kbdenable()
317 ciaa.icr = CIA_ICR_IR_SC | CIA_ICR_SP; /* SP interrupt enable */ in kbdenable()
656 for (ints = 0; ! ((mask = ciaa.icr) & CIA_ICR_SP); in kbdgetcn()
Dpar.c194 ciaa.icr = CIA_ICR_IR_SC | CIA_ICR_FLG; in paropen()
211 ciaa.icr = CIA_ICR_FLG; in parclose()
Dfd.c466 ciab.icr = CIA_ICR_FLG; in fdattach()
653 ciab.icr = CIA_ICR_FLG; in fdidxintr()
1403 ciab.icr = CIA_ICR_IR_SC | CIA_ICR_FLG; in fddmastart()
/netbsd/src/sys/dev/pci/
Dpcireg.h1312 #define PCI_MAX_LAT(icr) \ argument
1313 (((icr) >> PCI_MAX_LAT_SHIFT) & PCI_MAX_LAT_MASK)
1317 #define PCI_MIN_GNT(icr) \ argument
1318 (((icr) >> PCI_MIN_GNT_SHIFT) & PCI_MIN_GNT_MASK)
1322 #define PCI_INTERRUPT_GRANT(icr) \ argument
1323 (((icr) >> PCI_INTERRUPT_GRANT_SHIFT) & PCI_INTERRUPT_GRANT_MASK)
1327 #define PCI_INTERRUPT_LATENCY(icr) \ argument
1328 (((icr) >> PCI_INTERRUPT_LATENCY_SHIFT) & PCI_INTERRUPT_LATENCY_MASK)
1332 #define PCI_INTERRUPT_PIN(icr) \ argument
1333 (((icr) >> PCI_INTERRUPT_PIN_SHIFT) & PCI_INTERRUPT_PIN_MASK)
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Dif_ath_pci.c257 pcireg_t bhlc, csr, icr, lattimer; in ath_pci_setup() local
302 icr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_INTERRUPT_REG); in ath_pci_setup()
303 lattimer = MAX(0x10, MIN(0xf8, 8 * PCI_MIN_GNT(icr))); in ath_pci_setup()
Dif_dge.c1521 uint32_t icr; local
1525 icr = CSR_READ(sc, DGE_ICR);
1526 if ((icr & sc->sc_icr) == 0)
1529 rnd_add_uint32(&sc->rnd_source, icr);
1534 if (icr & (ICR_RXDMT0 | ICR_RXT0)) {
1538 icr & (ICR_RXDMT0 | ICR_RXT0)));
1545 if (icr & ICR_TXDW) {
1551 if (icr & ICR_TXQE)
1556 if (icr & (ICR_LSC | ICR_RXSEQ)) {
1558 dge_linkintr(sc, icr);
[all …]
Dpciconf.c593 pcireg_t classreg, cmd, icr, bhlc, bar, mask, bar64, mask64, in pci_do_device_query() local
661 icr = pci_conf_read(pb->pc, tag, PCI_INTERRUPT_REG); in pci_do_device_query()
662 pd->ipin = PCI_INTERRUPT_PIN(icr); in pci_do_device_query()
663 pd->iline = PCI_INTERRUPT_LINE(icr); in pci_do_device_query()
664 pd->min_gnt = PCI_MIN_GNT(icr); in pci_do_device_query()
665 pd->max_lat = PCI_MAX_LAT(icr); in pci_do_device_query()
669 icr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT); in pci_do_device_query()
670 icr |= (pd->iline << PCI_INTERRUPT_LINE_SHIFT); in pci_do_device_query()
671 pci_conf_write(pb->pc, tag, PCI_INTERRUPT_REG, icr); in pci_do_device_query()
Dif_ixl.c3413 uint32_t icr, rxintr, txintr; in ixl_intr() local
3420 icr = ixl_rd(sc, I40E_PFINT_ICR0); in ixl_intr()
3422 if (ISSET(icr, I40E_PFINT_ICR0_ADMINQ_MASK)) { in ixl_intr()
3429 if (ISSET(icr, I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK)) { in ixl_intr()
3435 rxintr = icr & I40E_INTR_NOTX_RX_MASK; in ixl_intr()
3436 txintr = icr & I40E_INTR_NOTX_TX_MASK; in ixl_intr()
3540 uint32_t icr, mask, reg; in ixl_other_intr() local
3543 icr = ixl_rd(sc, I40E_PFINT_ICR0); in ixl_other_intr()
3546 if (ISSET(icr, I40E_PFINT_ICR0_ADMINQ_MASK)) { in ixl_other_intr()
3553 if (ISSET(icr, I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK)) { in ixl_other_intr()
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Dif_wm.c10407 wm_linkintr_gmii(struct wm_softc *sc, uint32_t icr) in wm_linkintr_gmii() argument
10420 if ((icr & ICR_LSC) == 0) { in wm_linkintr_gmii()
10421 if (icr & ICR_RXSEQ) in wm_linkintr_gmii()
10719 wm_linkintr_tbi(struct wm_softc *sc, uint32_t icr) in wm_linkintr_tbi() argument
10728 if (icr & ICR_LSC) { in wm_linkintr_tbi()
10763 } else if (icr & ICR_RXSEQ) in wm_linkintr_tbi()
10775 wm_linkintr_serdes(struct wm_softc *sc, uint32_t icr) in wm_linkintr_serdes() argument
10785 if (icr & ICR_LSC) { in wm_linkintr_serdes()
10851 wm_linkintr(struct wm_softc *sc, uint32_t icr) in wm_linkintr() argument
10857 wm_linkintr_gmii(sc, icr); in wm_linkintr()
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Dif_iavf.c3232 uint32_t icr; in iavf_intr() local
3239 icr = iavf_rd(sc, I40E_VFINT_ICR01); in iavf_intr()
3241 if (icr == IAVF_REG_VFR) { in iavf_intr()
3249 if (ISSET(icr, I40E_VFINT_ICR01_ADMINQ_MASK)) { in iavf_intr()
3256 if (ISSET(icr, I40E_VFINT_ICR01_QUEUE_0_MASK)) { in iavf_intr()
/netbsd/src/sys/dev/ic/
Dsunscpal.c254 uint16_t icr; in sunscpal_dma_start() local
259 icr = SUNSCPAL_READ_2(sc, sunscpal_icr); in sunscpal_dma_start()
260 icr |= SUNSCPAL_ICR_DMA_ENABLE | in sunscpal_dma_start()
263 SUNSCPAL_WRITE_2(sc, sunscpal_icr, icr); in sunscpal_dma_start()
324 uint16_t icr; in sunscpal_dma_stop() local
335 icr = SUNSCPAL_READ_2(sc, sunscpal_icr); in sunscpal_dma_stop()
336 icr &= ~(SUNSCPAL_ICR_DMA_ENABLE | SUNSCPAL_ICR_WORD_MODE | in sunscpal_dma_stop()
338 SUNSCPAL_WRITE_2(sc, sunscpal_icr, icr); in sunscpal_dma_stop()
356 if (icr & (SUNSCPAL_ICR_BUS_ERROR)) { in sunscpal_dma_stop()
358 snprintb(buffer, sizeof(buffer), SUNSCPAL_ICR_BITS, icr); in sunscpal_dma_stop()
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Dsunscpalvar.h109 #define SUNSCPAL_BUS_PHASE(icr) ((icr) & SUNSCPAL_ICR_PHASE_MASK) argument
/netbsd/src/external/gpl3/binutils/dist/include/opcode/
Dtic6x-control-registers.h36 CTRL(icr, C62X, write, 0x3, 0x10)
/netbsd/src/external/gpl3/gdb/dist/include/opcode/
Dtic6x-control-registers.h36 CTRL(icr, C62X, write, 0x3, 0x10)
/netbsd/src/sys/dev/qbus/
Dif_qtreg.h160 #define icr qt_un0.csr0.Icr macro
/netbsd/src/sys/dev/cardbus/
Dcardbus.c444 pcireg_t bhlc, icr, lattimer; in cardbus_rescan() local
542 icr = cardbus_conf_read(cc, cf, tag, PCI_INTERRUPT_REG); in cardbus_rescan()
544 device_xname(sc->sc_dev), function, icr, bhlc)); in cardbus_rescan()
565 MIN(sc->sc_max_lattimer, MAX(0x10, 8 * PCI_MIN_GNT(icr))); in cardbus_rescan()
/netbsd/src/external/gpl3/gcc/dist/gcc/config/frv/
Dfrv.md1993 rtx icr = operands[2];
1997 emit_insn (gen_rtx_SET (icr, gen_rtx_LT (CC_CCRmode, icc, const0_rtx)));
2002 gen_rtx_NE (CC_CCRmode, icr, const0_rtx),
2006 emit_insn (gen_rtx_SET (icr, gen_rtx_EQ (CC_CCRmode, icc, const0_rtx)));
2009 gen_rtx_NE (CC_CCRmode, icr, const0_rtx),
2059 rtx icr = operands[2];
2063 emit_insn (gen_rtx_SET (icr, gen_rtx_GTU (CC_CCRmode, icc, const0_rtx)));
2068 gen_rtx_NE (CC_CCRmode, icr, const0_rtx),
2071 emit_insn (gen_rtx_SET (icr, gen_rtx_LTU (CC_CCRmode, icc, const0_rtx)));
2074 gen_rtx_NE (CC_CCRmode, icr, const0_rtx),
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/netbsd/src/external/bsd/file/dist/magic/magdir/
Dwordprocessors69 !:ext wpd/wpt/wkb/icr/tut/sty/tst/crs