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Searched refs:sc_atac (Results 1 – 25 of 75) sorted by relevance

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/netbsd/src/sys/dev/pci/
Dviaide.c432 sc->sc_wdcdev.sc_atac.atac_dev = self; in viaide_attach()
518 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; in via_chip_map()
529 sc->sc_wdcdev.sc_atac.atac_set_modes = sata_setup_channel; in via_chip_map()
530 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; in via_chip_map()
540 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, in via_chip_map()
547 sc->sc_wdcdev.sc_atac.atac_udma_cap = 2; in via_chip_map()
550 sc->sc_wdcdev.sc_atac.atac_udma_cap = 0; in via_chip_map()
557 sc->sc_wdcdev.sc_atac.atac_udma_cap = 4; in via_chip_map()
560 sc->sc_wdcdev.sc_atac.atac_udma_cap = 2; in via_chip_map()
567 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; in via_chip_map()
[all …]
Dartsata.c113 sc->sc_wdcdev.sc_atac.atac_dev = self; in artsata_attach()
136 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in artisea_mapregs()
144 device_xname(sc->sc_wdcdev.sc_atac.atac_dev)); in artisea_mapregs()
146 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, in artisea_mapregs()
149 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in artisea_mapregs()
162 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in artisea_mapregs()
170 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in artisea_mapregs()
181 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in artisea_mapregs()
196 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in artisea_mapregs()
204 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in artisea_mapregs()
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Dcmdide.c121 sc->sc_wdcdev.sc_atac.atac_dev = self; in cmdide_attach()
155 cp->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac; in cmd_channel_map()
159 sc->sc_wdcdev.sc_atac.atac_claim_hw = cmd064x_claim_hw; in cmd_channel_map()
160 sc->sc_wdcdev.sc_atac.atac_free_hw = cmd064x_free_hw; in cmd_channel_map()
164 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, in cmd_channel_map()
178 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, in cmd_channel_map()
213 for(uint i = 0; i < sc->sc_wdcdev.sc_atac.atac_nchannels; i++) { in cmd064x_free_hw()
238 for (i = 0; i < sc->sc_wdcdev.sc_atac.atac_nchannels; i++) { in cmd_pci_intr()
250 sc->sc_wdcdev.sc_atac.atac_dev), i); in cmd_pci_intr()
278 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, in cmd_chip_map()
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Dpdcsata.c216 sc->sc_wdcdev.sc_atac.atac_dev = self; in pdcsata_attach()
238 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pdcsata_chip_map()
246 device_xname(sc->sc_wdcdev.sc_atac.atac_dev)); in pdcsata_chip_map()
249 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pdcsata_chip_map()
256 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pdcsata_chip_map()
264 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pdcsata_chip_map()
275 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pdcsata_chip_map()
282 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pdcsata_chip_map()
284 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16; in pdcsata_chip_map()
286 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; in pdcsata_chip_map()
[all …]
Dsatalink.c322 sc->sc_wdcdev.sc_atac.atac_dev = self; in satalink_attach()
446 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in sii3112_chip_map()
453 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in sii3112_chip_map()
458 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in sii3112_chip_map()
467 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in sii3112_chip_map()
487 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in sii3112_chip_map()
488 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in sii3112_chip_map()
490 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; in sii3112_chip_map()
492 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in sii3112_chip_map()
493 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; in sii3112_chip_map()
[all …]
Dsvwsata.c99 sc->sc_wdcdev.sc_atac.atac_dev = self; in svwsata_attach()
131 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in svwsata_chip_map()
138 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in svwsata_chip_map()
139 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in svwsata_chip_map()
141 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; in svwsata_chip_map()
143 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in svwsata_chip_map()
144 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; in svwsata_chip_map()
147 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; in svwsata_chip_map()
148 sc->sc_wdcdev.sc_atac.atac_nchannels = 4; in svwsata_chip_map()
149 sc->sc_wdcdev.sc_atac.atac_set_modes = sata_setup_channel; in svwsata_chip_map()
[all …]
Dsiside.c103 sc->sc_wdcdev.sc_atac.atac_dev = self; in siside_attach()
234 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, in sis_chip_map()
247 sc->sc_wdcdev.sc_atac.atac_udma_cap = in sis_chip_map()
252 sc->sc_wdcdev.sc_atac.atac_udma_cap = in sis_chip_map()
256 sc->sc_wdcdev.sc_atac.atac_udma_cap = in sis_chip_map()
262 sc->sc_wdcdev.sc_atac.atac_udma_cap = in sis_chip_map()
269 sc->sc_wdcdev.sc_atac.atac_udma_cap = 2; in sis_chip_map()
272 sc->sc_wdcdev.sc_atac.atac_udma_cap = 0; in sis_chip_map()
278 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in sis_chip_map()
283 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in sis_chip_map()
[all …]
Diteide.c90 sc->sc_wdcdev.sc_atac.atac_dev = self; in iteide_attach()
111 device_xname(sc->sc_wdcdev.sc_atac.atac_dev), cfg & IT_CFG_MASK, in ite_chip_map()
117 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in ite_chip_map()
122 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in ite_chip_map()
125 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; in ite_chip_map()
128 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in ite_chip_map()
129 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in ite_chip_map()
130 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; in ite_chip_map()
132 sc->sc_wdcdev.sc_atac.atac_set_modes = ite_setup_channel; in ite_chip_map()
133 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; in ite_chip_map()
[all …]
Dpciide_common.c183 rv = wdcdetach(sc->sc_wdcdev.sc_atac.atac_dev, flags); in pciide_common_detach()
187 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; in pciide_common_detach()
236 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; in pciide_detach()
248 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; in pciide_detach()
273 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pciide_chipen()
279 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pciide_chipen()
300 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pciide_mapregs_compat()
309 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pciide_mapregs_compat()
319 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pciide_mapregs_compat()
351 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pciide_mapregs_native()
[all …]
Dcypide.c83 sc->sc_wdcdev.sc_atac.atac_dev = self; in cypide_attach()
109 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in cy693_chip_map()
114 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in cy693_chip_map()
118 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, in cy693_chip_map()
125 aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev, in cy693_chip_map()
130 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in cy693_chip_map()
132 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; in cy693_chip_map()
135 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in cy693_chip_map()
136 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in cy693_chip_map()
137 sc->sc_wdcdev.sc_atac.atac_set_modes = cy693_setup_channel; in cy693_chip_map()
[all …]
Drccide.c106 sc->sc_wdcdev.sc_atac.atac_dev = self; in rccide_attach()
123 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in serverworks_chip_map()
127 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in serverworks_chip_map()
130 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; in serverworks_chip_map()
133 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in serverworks_chip_map()
134 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in serverworks_chip_map()
137 sc->sc_wdcdev.sc_atac.atac_udma_cap = 2; in serverworks_chip_map()
141 sc->sc_wdcdev.sc_atac.atac_udma_cap = 4; in serverworks_chip_map()
143 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; in serverworks_chip_map()
148 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; in serverworks_chip_map()
[all …]
Dhptide.c100 sc->sc_wdcdev.sc_atac.atac_dev = self; in hptide_attach()
118 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, in hpt_chip_map()
172 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in hpt_chip_map()
176 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in hpt_chip_map()
178 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; in hpt_chip_map()
181 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in hpt_chip_map()
182 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in hpt_chip_map()
184 sc->sc_wdcdev.sc_atac.atac_set_modes = hpt_setup_channel; in hpt_chip_map()
185 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; in hpt_chip_map()
188 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; in hpt_chip_map()
[all …]
Dtoshide.c103 sc->sc_wdcdev.sc_atac.atac_dev = self; in piccolo_attach()
124 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in piccolo_chip_map()
130 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA32 | ATAC_CAP_DATA16; in piccolo_chip_map()
131 sc->sc_wdcdev.sc_atac.atac_pio_cap = 5; in piccolo_chip_map()
134 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; in piccolo_chip_map()
136 sc->sc_wdcdev.sc_atac.atac_dma_cap = 3; in piccolo_chip_map()
137 sc->sc_wdcdev.sc_atac.atac_udma_cap = 2; in piccolo_chip_map()
140 sc->sc_wdcdev.sc_atac.atac_set_modes = piccolo_setup_channel; in piccolo_chip_map()
142 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; in piccolo_chip_map()
143 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; in piccolo_chip_map()
[all …]
Daceride.c90 sc->sc_wdcdev.sc_atac.atac_dev = self; in aceride_attach()
123 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in acer_chip_map()
127 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in acer_chip_map()
129 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; in acer_chip_map()
131 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_UDMA; in acer_chip_map()
133 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; in acer_chip_map()
135 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; in acer_chip_map()
137 sc->sc_wdcdev.sc_atac.atac_udma_cap = 4; in acer_chip_map()
139 sc->sc_wdcdev.sc_atac.atac_udma_cap = 2; in acer_chip_map()
144 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in acer_chip_map()
[all …]
Dstpcide.c80 sc->sc_wdcdev.sc_atac.atac_dev = self; in stpcide_attach()
97 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in stpc_chip_map()
101 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in stpc_chip_map()
103 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; in stpc_chip_map()
106 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in stpc_chip_map()
107 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in stpc_chip_map()
108 sc->sc_wdcdev.sc_atac.atac_udma_cap = 0; in stpc_chip_map()
109 sc->sc_wdcdev.sc_atac.atac_set_modes = stpc_setup_channel; in stpc_chip_map()
110 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; in stpc_chip_map()
111 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; in stpc_chip_map()
[all …]
Dschide.c110 sc->sc_wdcdev.sc_atac.atac_dev = self; in schide_attach()
127 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in sch_chip_map()
131 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in sch_chip_map()
134 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; in sch_chip_map()
137 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in sch_chip_map()
138 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in sch_chip_map()
139 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; in sch_chip_map()
140 sc->sc_wdcdev.sc_atac.atac_set_modes = sch_setup_channel; in sch_chip_map()
141 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; in sch_chip_map()
142 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; in sch_chip_map()
[all …]
Dgeodeide.c96 sc->sc_wdcdev.sc_atac.atac_dev = self; in geodeide_attach()
111 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in geodeide_chip_map()
116 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DMA | ATAC_CAP_UDMA; in geodeide_chip_map()
124 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in geodeide_chip_map()
125 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in geodeide_chip_map()
126 sc->sc_wdcdev.sc_atac.atac_udma_cap = 2; in geodeide_chip_map()
133 sc->sc_wdcdev.sc_atac.atac_udma_cap = 1; in geodeide_chip_map()
135 sc->sc_wdcdev.sc_atac.atac_set_modes = geodeide_setup_channel; in geodeide_chip_map()
136 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; in geodeide_chip_map()
137 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; in geodeide_chip_map()
[all …]
Dpiixide.c391 sc->sc_wdcdev.sc_atac.atac_dev = self; in piixide_attach()
437 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in piix_chip_map()
441 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in piix_chip_map()
443 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; in piix_chip_map()
463 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_UDMA; in piix_chip_map()
466 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in piix_chip_map()
467 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in piix_chip_map()
470 sc->sc_wdcdev.sc_atac.atac_udma_cap = 4; in piix_chip_map()
483 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; in piix_chip_map()
486 sc->sc_wdcdev.sc_atac.atac_udma_cap = 2; in piix_chip_map()
[all …]
Dslide.c103 sc->sc_wdcdev.sc_atac.atac_dev = self; in slide_attach()
138 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in sl82c105_chip_map()
152 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA32 | ATAC_CAP_DATA16; in sl82c105_chip_map()
153 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in sl82c105_chip_map()
155 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; in sl82c105_chip_map()
157 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in sl82c105_chip_map()
159 sc->sc_wdcdev.sc_atac.atac_set_modes = sl82c105_setup_channel; in sl82c105_chip_map()
161 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; in sl82c105_chip_map()
162 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; in sl82c105_chip_map()
171 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; in sl82c105_chip_map()
[all …]
Dacardide.c102 sc->sc_wdcdev.sc_atac.atac_dev = self; in acardide_attach()
133 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in acard_chip_map()
137 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in acard_chip_map()
140 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; in acard_chip_map()
143 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in acard_chip_map()
144 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in acard_chip_map()
148 sc->sc_wdcdev.sc_atac.atac_udma_cap = 4; in acard_chip_map()
152 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; in acard_chip_map()
155 sc->sc_wdcdev.sc_atac.atac_udma_cap = 2; in acard_chip_map()
159 sc->sc_wdcdev.sc_atac.atac_set_modes = acard_setup_channel; in acard_chip_map()
[all …]
Dpdcide.c135 sc->sc_wdcdev.sc_atac.atac_dev = self; in pdcide_attach()
210 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in pdc202xx_chip_map()
214 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in pdc202xx_chip_map()
216 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; in pdc202xx_chip_map()
221 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_RAID; in pdc202xx_chip_map()
222 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in pdc202xx_chip_map()
223 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in pdc202xx_chip_map()
225 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; in pdc202xx_chip_map()
227 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; in pdc202xx_chip_map()
229 sc->sc_wdcdev.sc_atac.atac_udma_cap = 4; in pdc202xx_chip_map()
[all …]
Dnside.c84 sc->sc_wdcdev.sc_atac.atac_dev = self; in nside_attach()
100 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in natsemi_chip_map()
105 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16; in natsemi_chip_map()
108 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; in natsemi_chip_map()
122 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in natsemi_chip_map()
123 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in natsemi_chip_map()
124 sc->sc_wdcdev.sc_atac.atac_set_modes = natsemi_setup_channel; in natsemi_chip_map()
125 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; in natsemi_chip_map()
126 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; in natsemi_chip_map()
142 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; channel++) { in natsemi_chip_map()
[all …]
/netbsd/src/sys/dev/isa/
Dwdc_isa.c167 sc->sc_wdcdev.sc_atac.atac_dev = self; in wdc_isa_attach()
197 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; in wdc_isa_attach()
206 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; in wdc_isa_attach()
208 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32; in wdc_isa_attach()
210 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATA_NOSTREAM; in wdc_isa_attach()
212 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATAPI_NOSTREAM; in wdc_isa_attach()
214 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; in wdc_isa_attach()
216 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist; in wdc_isa_attach()
217 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; in wdc_isa_attach()
220 sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac; in wdc_isa_attach()
[all …]
/netbsd/src/sys/arch/i386/pci/
Dgcscide.c147 sc->sc_wdcdev.sc_atac.atac_dev = self; in gcscide_attach()
161 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, in gcscide_chip_map()
166 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in gcscide_chip_map()
168 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; in gcscide_chip_map()
172 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; in gcscide_chip_map()
173 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; in gcscide_chip_map()
174 sc->sc_wdcdev.sc_atac.atac_udma_cap = 4; in gcscide_chip_map()
175 sc->sc_wdcdev.sc_atac.atac_set_modes = gcscide_setup_channel; in gcscide_chip_map()
176 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; in gcscide_chip_map()
177 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; in gcscide_chip_map()
/netbsd/src/sys/arch/i386/pnpbios/
Dpciide_pnpbios.c90 sc->sc_wdcdev.sc_atac.atac_dev = self; in pciide_pnpbios_attach()
119 cp->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac; in pciide_pnpbios_attach()
140 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; in pciide_pnpbios_attach()
141 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; in pciide_pnpbios_attach()
142 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; in pciide_pnpbios_attach()
144 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32; in pciide_pnpbios_attach()
145 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; in pciide_pnpbios_attach()
146 sc->sc_wdcdev.sc_atac.atac_dma_cap = 0; /* XXX */ in pciide_pnpbios_attach()
147 sc->sc_wdcdev.sc_atac.atac_udma_cap = 0; /* XXX */ in pciide_pnpbios_attach()
189 sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; in pciide_pnpbios_attach()

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