Searched refs:vregs (Results 1 – 14 of 14) sorted by relevance
185 struct videl *vregs; in falcon_probe_video() local202 vregs = falcon_getreg(vm_mode(dm) | mon_type); in falcon_probe_video()203 if (vregs) { in falcon_probe_video()204 vm_regs(dm) = vregs; in falcon_probe_video()221 struct videl *vregs; in falcon_getreg() local223 for (i = 0; (vregs = &videlinit[i])->video_mode != 0xffff; i++) in falcon_getreg()224 if ((vregs->video_mode) == mode) in falcon_getreg()225 return vregs; in falcon_getreg()234 struct videl *vregs = vm_regs(dm); in falcon_detect() local240 vregs->vd_syncmode = VIDEO->vd_sync; in falcon_detect()[all …]
79 struct gcc_vregs vregs; member204 struct gcc_vregs *vregs; in ppc_fallback_frame_state() local260 vregs = regs->vp; in ppc_fallback_frame_state()262 vregs = ®s->vregs; in ppc_fallback_frame_state()269 fs->regs.reg[i + R_VR0].loc.offset = (long) &vregs->vr[i] - new_cfa; in ppc_fallback_frame_state()274 fs->regs.reg[R_VRSAVE].loc.offset = (long) &vregs->vsave - new_cfa; in ppc_fallback_frame_state()283 = (long) ®s->vregs - new_cfa + 4 * i; in ppc_fallback_frame_state()
120 set vregs [capture_command_output "x/64xg &save_area" ""]123 foreach {- left right} [regexp -all -inline -line {^.*:\s+(\w+)\s+(\w+)} $vregs] {143 set vregs [capture_command_output "info registers vector" ""]156 {^(\D*)(\d+)\s+.*?uint128 = 0x([0-9a-f]+?)} $vregs] {202 if { $vregs_from_core eq $vregs } {
156 process_machdep_read_vecregs(struct lwp *l, struct vreg *vregs) in process_machdep_read_vecregs() argument167 memset(vregs, 0, sizeof (*vregs)); in process_machdep_read_vecregs()170 *vregs = pcb->pcb_vr; in process_machdep_read_vecregs()178 process_machdep_write_vecregs(struct lwp *l, struct vreg *vregs) in process_machdep_write_vecregs() argument190 pcb->pcb_vr = *vregs; /* pcb_vr is initialized now. */ in process_machdep_write_vecregs()
32 reg64_t vregs[32]; /* vector registers. */ member93 #define VR (V850_SIM_CPU (CPU)->reg.vregs)
243 regcache->raw_supply (regno, ®s.vregs[regno - AARCH64_V0_REGNUM]); in fetch_fpregs_from_thread()291 (regno, (char *) ®s.vregs[regno - AARCH64_V0_REGNUM]); in store_fpregs_to_thread()
5552 * config/rl78/vregs.h (START_FUNC): New macro.5725 * config/rl78/vregs.h (START_FUNC): New macro.7289 * config/rl78/vregs.h: Add G10 register definitions.7292 * config/rl78/lshrsi3.S: Use vregs.h.7301 * config/rl78/vregs.h: New.
11663 * gdb.arch/s390-vregs.exp: Explicitly cast the return values of13122 * gdb.arch/s390-vregs.exp: Calculate parameters to hex128 in the13306 * gdb.arch/s390-vregs.exp (hex128): New proc.13997 * gdb.arch/s390-vregs.exp20163 * gdb.arch/s390-vregs.S (change_vrs): Replace exrl by an20165 * gdb.arch/s390-vregs.exp: Add the compile flag -mzarch, to enable20762 * gdb.arch/s390-vregs.exp: New test.20763 * gdb.arch/s390-vregs.S: New file.
2918 6c95c7f2b541fe859ff3ea6a935dd4079d6ffce563172960baa91d2ff3b3e0eb gdb/testsuite/gdb.arch/s390-vregs…3040 e9714e3e0283c0b57354193c976eb9f4b2151515a334a247b9515bc5dc27e0c9 gdb/testsuite/gdb.arch/s390-vregs…
17982 @item -fdump-rtl-vregs17983 @opindex fdump-rtl-vregs
16977 '-fdump-rtl-vregs'63919 * fdump-rtl-vregs: Developer Options. (line 232)
25403 (regno_reg_class): New vregs for fpuv3.
18385 vregs location for RL78/G10.
43765 454cb76cf4a06abba08354e6a236e7a8 gcc/testsuite/gcc.dg/rtl/x86_64/vregs.c94272 760912f22e59adbfe0317ee3df1b4849 libgcc/config/rl78/vregs.h