Searched refs:vs0 (Results 1 – 11 of 11) sorted by relevance
44 "A VSX register (VSR), @code{vs0}@dots{}@code{vs63}. This is either an45 FPR (@code{vs0}@dots{}@code{vs31} are @code{f0}@dots{}@code{f31}) or a VR
175 #define vs0 0 macro
237 #vs0 at intio0 addr 0xe92000 dma 3 dmaintr 106
276 vs0 at intio0 addr 0xe92000 dma 3 dmaintr 106
2480 "f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63".
3243 A VSX register (VSR), @code{vs0}@dots{}@code{vs63}. This is either an3244 FPR (@code{vs0}@dots{}@code{vs31} are @code{f0}@dots{}@code{f31}) or a VR
24828 A VSX register (VSR), 'vs0'...'vs63'. This is either an FPR24829 ('vs0'...'vs31' are 'f0'...'f31') or a VR ('vs32'...'vs63' are
44104 A VSX register (VSR), 'vs0'...'vs63'. This is either an FPR44105 ('vs0'...'vs31' are 'f0'...'f31') or a VR ('vs32'...'vs63' are
4746 (rs6000_register_name): Hide upper halves of vs0~vs31. Return
15084 (vs0-vs63): Define if VSX.
49647 @samp{vr31}) to present the 128-bit wide registers @samp{vs0} through