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Searched refs:ANDS (Results 1 – 10 of 10) sorted by relevance

/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/
DARMScheduleR52.td308 def : InstRW<[R52WriteALU_EX2, R52Read_EX1], (instregex "AD(C|D)S?ri", "ANDS?ri",
314 "ANDS?rr", "BICS?rr", "CRC", "EORrr", "ORRrr", "RSBrr", "RSCrr", "SBCrr",
318 "ANDS?rsi", "BICS?rsi", "EORrsi", "ORRrsi", "RSBrsi", "RSCrsi", "SBCrsi",
322 (instregex "AD(C|D)S?rsr", "ANDS?rsr", "BICS?rsr", "EORrsr", "MVNS?sr",
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/
DAArch64SchedA64FX.td604 "AND?(W|X)r(i|r|s|x)", "ANDS?(W|X)r(i|r|s|x)",
624 "AND?(W|X)r(i|r|s|x)", "ANDS?(W|X)r(i|r|s|x)",
641 "AND?(W|X)r(i|r|s|x)", "ANDS?(W|X)r(i|r|s|x)",
2094 (instregex "^ANDS?_P", "^BICS?_P", "^BRK.*_P", "^EORS?_P", "^ORRS?_P",
DAArch64SchedThunderX3T110.td687 "AND?(W|X)r(i|r|s|x)", "ANDS?(W|X)r(i|r|s|x)",
709 "AND?(W|X)r(i|r|s|x)", "ANDS?(W|X)r(i|r|s|x)",
728 "AND?(W|X)r(i|r|s|x)", "ANDS?(W|X)r(i|r|s|x)",
DAArch64SchedThunderX2T99.td427 "AND?(W|X)r(i|r|s|x)", "ANDS?(W|X)r(i|r|s|x)",
449 "AND?(W|X)r(i|r|s|x)", "ANDS?(W|X)r(i|r|s|x)",
468 "AND?(W|X)r(i|r|s|x)", "ANDS?(W|X)r(i|r|s|x)",
DAArch64ISelLowering.h158 ANDS, enumerator
DAArch64SchedTSV110.td58 // 1cyc_1BRU: ADDS, ADCS, ANDS, BICS, SUBS, SBCS, CCMN, CCMP
DAArch64ISelLowering.cpp2355 MAKE_CASE(AArch64ISD::ANDS) in getTargetNodeName()
3081 const SDValue ANDSNode = DAG.getNode(AArch64ISD::ANDS, dl, in emitComparison()
3088 } else if (LHS.getOpcode() == AArch64ISD::ANDS) { in emitComparison()
3603 DAG.getNode(AArch64ISD::ANDS, DL, VTs, Mul, UpperBits).getValue(1); in getAArch64XALUOOp()
19908 SDValue ANDS = DAG.getNode( in performSubsToAndsCombine() local
19909 AArch64ISD::ANDS, DL, SubsNode->getVTList(), AndNode->getOperand(0), in performSubsToAndsCombine()
19924 ANDS.getValue(1)}; in performSubsToAndsCombine()
21405 case AArch64ISD::ANDS: in PerformDAGCombine()
DAArch64SchedNeoverseN2.td1526 (instregex "^(ANDS|BICS|EORS|NANDS|NORS|ORNS|ORRS)_PPzPP$")>;
DAArch64ISelDAGToDAG.cpp3492 !isOpcWithIntImmediate(ShiftAmt.getNode(), AArch64ISD::ANDS, MaskImm)) in tryShiftAmountMod()
DAArch64InstrInfo.td616 def AArch64and_flag : SDNode<"AArch64ISD::ANDS", SDTBinaryArithWithFlagsOut,
2201 defm ANDS : LogicalImmS<0b11, "ands", AArch64and_flag, "bics">;
2216 defm ANDS : LogicalRegS<0b11, 0, "ands", AArch64and_flag>;