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Searched refs:CLK_BASE (Results 1 – 18 of 18) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/display/dc/inc/hw/
Dclk_mgr_internal.h81 #define CLK_BASE(inst) \ macro
85 .reg_name = CLK_BASE(mm ## block ## _ ## inst ## _ ## reg_name ## _BASE_IDX) + \
/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Dvega10_reg_init.c53 adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i])); in vega10_reg_base_init()
Dvega20_reg_init.c51 adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i])); in vega20_reg_base_init()
/openbsd/src/sys/dev/pci/drm/amd/include/
Dcyan_skillfish_ip_offset.h43 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0, 0, 0, 0 } }, variable
Dnavi10_ip_offset.h43 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x00016E00, 0x00017000, 0x0001… variable
Dnavi12_ip_offset.h44 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x02401800, 0, 0, 0 } }, variable
Dvega20_ip_offset.h43 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x00016E00, 0x00017000, 0x00017200, 0x0… variable
Ddimgrey_cavefish_ip_offset.h44 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0, 0 } }, variable
Dnavi14_ip_offset.h44 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x02401800, 0, 0, 0 } }, variable
Dsienna_cichlid_ip_offset.h44 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0 } }, variable
Dbeige_goby_ip_offset.h45 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0, 0 } }, variable
Drenoir_ip_offset.h51 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x00016E00, 0x00017000, 0x00017E00, 0 } }, variable
Dvega10_ip_offset.h201 static const struct IP_BASE __maybe_unused CLK_BASE = { { { { 0x00016C00, 0, 0, 0, 0 } }, variable
Dvangogh_ip_offset.h56 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0, 0 } }, variable
Dyellow_carp_offset.h33 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0, 0 } }, variable
Darct_ip_offset.h45 static const struct IP_BASE CLK_BASE ={ { { { 0x000120C0, 0x00016C00, 0x00401800, 0, 0, … variable
Daldebaran_ip_offset.h42 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0, 0 } }, variable
/openbsd/src/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr.c51 (CLK_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)