| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 3352 { ISD::CTPOP, MVT::v32i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3353 { ISD::CTPOP, MVT::v64i8, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3354 { ISD::CTPOP, MVT::v16i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3355 { ISD::CTPOP, MVT::v32i8, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3356 { ISD::CTPOP, MVT::v8i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3357 { ISD::CTPOP, MVT::v16i8, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3360 { ISD::CTPOP, MVT::v8i64, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3361 { ISD::CTPOP, MVT::v16i32, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3362 { ISD::CTPOP, MVT::v4i64, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() 3363 { ISD::CTPOP, MVT::v8i32, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost() [all …]
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| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 703 CTPOP, enumerator
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| D | BasicTTIImpl.h | 2090 ISD = ISD::CTPOP; in getTypeBasedIntrinsicInstrCost()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64TargetTransformInfo.cpp | 414 {ISD::CTPOP, MVT::v2i64, 4}, in getIntrinsicInstrCost() 415 {ISD::CTPOP, MVT::v4i32, 3}, in getIntrinsicInstrCost() 416 {ISD::CTPOP, MVT::v8i16, 2}, in getIntrinsicInstrCost() 417 {ISD::CTPOP, MVT::v16i8, 1}, in getIntrinsicInstrCost() 418 {ISD::CTPOP, MVT::i64, 4}, in getIntrinsicInstrCost() 419 {ISD::CTPOP, MVT::v2i32, 3}, in getIntrinsicInstrCost() 420 {ISD::CTPOP, MVT::v4i16, 2}, in getIntrinsicInstrCost() 421 {ISD::CTPOP, MVT::v8i8, 1}, in getIntrinsicInstrCost() 422 {ISD::CTPOP, MVT::i32, 5}, in getIntrinsicInstrCost() 426 if (const auto *Entry = CostTableLookup(CtpopCostTbl, ISD::CTPOP, MTy)) { in getIntrinsicInstrCost()
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| D | AArch64ISelLowering.cpp | 566 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in AArch64TargetLowering() 567 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in AArch64TargetLowering() 568 setOperationAction(ISD::CTPOP, MVT::i128, Expand); in AArch64TargetLowering() 589 setOperationAction(ISD::CTPOP, MVT::i32, Custom); in AArch64TargetLowering() 590 setOperationAction(ISD::CTPOP, MVT::i64, Custom); in AArch64TargetLowering() 591 setOperationAction(ISD::CTPOP, MVT::i128, Custom); in AArch64TargetLowering() 1219 setOperationAction(ISD::CTPOP, VT, Custom); in AArch64TargetLowering() 1596 setOperationAction(ISD::CTPOP, VT, Custom); in addTypeForNEON() 1742 setOperationAction(ISD::CTPOP, VT, Custom); in addTypeForStreamingSVE() 1859 setOperationAction(ISD::CTPOP, VT, Custom); in addTypeForFixedLengthSVE() [all …]
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2150 case ISD::CTPOP: { in SimplifyDemandedBits() 4030 SDValue CTPOP = N0; in simplifySetCCWithCTPOP() local 4033 CTPOP = N0.getOperand(0); in simplifySetCCWithCTPOP() 4035 if (CTPOP.getOpcode() != ISD::CTPOP || !CTPOP.hasOneUse()) in simplifySetCCWithCTPOP() 4038 EVT CTVT = CTPOP.getValueType(); in simplifySetCCWithCTPOP() 4039 SDValue CTOp = CTPOP.getOperand(0); in simplifySetCCWithCTPOP() 4046 if (CTVT.isVector() && TLI.isOperationLegal(ISD::CTPOP, CTVT)) in simplifySetCCWithCTPOP() 4072 if (TLI.isOperationLegal(ISD::CTPOP, CTVT)) in simplifySetCCWithCTPOP() 8387 (!isOperationLegalOrCustom(ISD::CTPOP, VT) && in expandCTLZ() 8408 return DAG.getNode(ISD::CTPOP, dl, VT, Op); in expandCTLZ() [all …]
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| D | LegalizeVectorOps.cpp | 349 case ISD::CTPOP: in LegalizeOp() 797 case ISD::CTPOP: in Expand()
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| D | SelectionDAGDumper.cpp | 437 case ISD::CTPOP: return "ctpop"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 69 case ISD::CTPOP: Res = PromoteIntRes_CTPOP_PARITY(N); break; in PromoteIntegerResult() 594 if (N->getOpcode() == ISD::CTPOP && !OVT.isVector() && TLI.isTypeLegal(NVT) && in PromoteIntRes_CTPOP_PARITY() 595 !TLI.isOperationLegalOrCustomOrPromote(ISD::CTPOP, NVT)) { in PromoteIntRes_CTPOP_PARITY() 620 !TLI.isOperationLegal(ISD::CTPOP, NVT) && in PromoteIntRes_CTTZ() 2428 case ISD::CTPOP: ExpandIntRes_CTPOP(N, Lo, Hi); break; in ExpandIntegerResult() 3370 Lo = DAG.getNode(ISD::ADD, dl, NVT, DAG.getNode(ISD::CTPOP, dl, NVT, Lo), in ExpandIntRes_CTPOP() 3371 DAG.getNode(ISD::CTPOP, dl, NVT, Hi)); in ExpandIntRes_CTPOP()
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| D | LegalizeDAG.cpp | 2674 if (TLI.isOperationLegalOrPromote(ISD::CTPOP, VT)) { in ExpandPARITY() 2675 Result = DAG.getNode(ISD::CTPOP, dl, VT, Op); in ExpandPARITY() 2699 case ISD::CTPOP: in ExpandNode() 4507 case ISD::CTPOP: in PromoteNode()
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| D | SelectionDAG.cpp | 3425 case ISD::CTPOP: { in computeKnownBits() 4745 case ISD::CTPOP: in canCreateUndefOrPoison() 5227 case ISD::CTPOP: in getNode() 5356 case ISD::CTPOP: { in getNode() 5585 case ISD::CTPOP: in getNode()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64LegalizerInfo.cpp | 1365 auto CTPOP = MIRBuilder.buildCTPOP(VTy, Val); in legalizeCTPOP() local 1368 Register HSum = CTPOP.getReg(0); in legalizeCTPOP()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1564 setOperationAction(ISD::CTPOP, MVT::i8, Promote); in HexagonTargetLowering() 1565 setOperationAction(ISD::CTPOP, MVT::i16, Promote); in HexagonTargetLowering() 1566 setOperationAction(ISD::CTPOP, MVT::i32, Promote); in HexagonTargetLowering() 1567 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in HexagonTargetLowering() 1631 ISD::CTPOP, ISD::CTLZ, ISD::CTTZ, ISD::BSWAP, ISD::BITREVERSE, in HexagonTargetLowering()
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| D | HexagonISelLoweringHVX.cpp | 202 setOperationAction(ISD::CTPOP, T, Legal); in initializeHVXLowering() 294 setOperationAction(ISD::CTPOP, T, Custom); in initializeHVXLowering() 3161 case ISD::CTPOP: in LowerHvxOperation()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 108 setOperationAction(ISD::CTPOP, MVT::i8, Expand); in MSP430TargetLowering() 109 setOperationAction(ISD::CTPOP, MVT::i16, Expand); in MSP430TargetLowering()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 233 setOperationAction(ISD::CTPOP, MVT::v16i8, Legal); in WebAssemblyTargetLowering() 238 for (auto Op : {ISD::CTLZ, ISD::CTTZ, ISD::CTPOP}) in WebAssemblyTargetLowering() 1443 case ISD::CTPOP: in LowerOperation()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 115 setOperationAction(ISD::CTPOP, VT, Expand); in BPFTargetLowering()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 167 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in R600TargetLowering() 170 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in R600TargetLowering()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 400 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in MipsTargetLowering() 401 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in MipsTargetLowering() 403 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in MipsTargetLowering() 404 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in MipsTargetLowering()
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| D | MipsSEISelLowering.cpp | 329 setOperationAction(ISD::CTPOP, Ty, Legal); in addMSAIntType() 2110 return DAG.getNode(ISD::CTPOP, DL, Op->getValueType(0), Op->getOperand(1)); in lowerINTRINSIC_WO_CHAIN()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 203 setOperationAction(ISD::CTPOP, VT, Custom); in SystemZTargetLowering() 205 setOperationAction(ISD::CTPOP, VT, Expand); in SystemZTargetLowering() 284 setOperationAction(ISD::CTPOP, MVT::i32, Promote); in SystemZTargetLowering() 285 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in SystemZTargetLowering() 375 setOperationAction(ISD::CTPOP, VT, Legal); in SystemZTargetLowering() 377 setOperationAction(ISD::CTPOP, VT, Custom); in SystemZTargetLowering() 5747 case ISD::CTPOP: in LowerOperation()
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| /openbsd/src/gnu/llvm/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1495 is rarely used. In ``SparcISelLowering.cpp``, the action for ``CTPOP`` (an 1502 setOperationAction(ISD::CTPOP, MVT::i32, Expand); 1505 setOperationAction(ISD::CTPOP, MVT::i32, Legal);
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 126 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in LanaiTargetLowering()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 289 setOperationAction(ISD::CTPOP, VT, Expand); in addMVEVectorTypes() 956 setOperationAction(ISD::CTPOP, MVT::v2i32, Custom); in ARMTargetLowering() 957 setOperationAction(ISD::CTPOP, MVT::v4i32, Custom); in ARMTargetLowering() 958 setOperationAction(ISD::CTPOP, MVT::v4i16, Custom); in ARMTargetLowering() 959 setOperationAction(ISD::CTPOP, MVT::v8i16, Custom); in ARMTargetLowering() 960 setOperationAction(ISD::CTPOP, MVT::v1i64, Custom); in ARMTargetLowering() 961 setOperationAction(ISD::CTPOP, MVT::v2i64, Custom); in ARMTargetLowering() 1187 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in ARMTargetLowering() 6458 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ() 6486 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ() [all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1710 setOperationAction(ISD::CTPOP, MVT::i64, in SparcTargetLowering() 1847 setOperationAction(ISD::CTPOP, MVT::i32, in SparcTargetLowering()
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